ath5k: Cleanups v2 + add kerneldoc on all hw functions
No functional changes Add kernel doc for all ath5k_hw_* functions and strcucts. Also do some cleanup, rename ath5k_hw_init_beacon to ath5k_hw_init_beacon_timers, remove an unused variable from ath5k_hw_pcu_init and a few obsolete macros, mostly related to XR. Signed-off-by: Nick Kossifidis <mickflemm@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
Nick Kossifidis
committato da
John W. Linville
John W. Linville
parent
1846ac3dbe
commit
c47faa364c
@@ -30,11 +30,47 @@
|
||||
#include "reg.h"
|
||||
#include "debug.h"
|
||||
|
||||
/*
|
||||
/**
|
||||
* DOC: Protocol Control Unit (PCU) functions
|
||||
*
|
||||
* Protocol control unit is responsible to maintain various protocol
|
||||
* properties before a frame is send and after a frame is received to/from
|
||||
* baseband. To be more specific, PCU handles:
|
||||
*
|
||||
* - Buffering of RX and TX frames (after QCU/DCUs)
|
||||
*
|
||||
* - Encrypting and decrypting (using the built-in engine)
|
||||
*
|
||||
* - Generating ACKs, RTS/CTS frames
|
||||
*
|
||||
* - Maintaining TSF
|
||||
*
|
||||
* - FCS
|
||||
*
|
||||
* - Updating beacon data (with TSF etc)
|
||||
*
|
||||
* - Generating virtual CCA
|
||||
*
|
||||
* - RX/Multicast filtering
|
||||
*
|
||||
* - BSSID filtering
|
||||
*
|
||||
* - Various statistics
|
||||
*
|
||||
* -Different operating modes: AP, STA, IBSS
|
||||
*
|
||||
* Note: Most of these functions can be tweaked/bypassed so you can do
|
||||
* them on sw above for debugging or research. For more infos check out PCU
|
||||
* registers on reg.h.
|
||||
*/
|
||||
|
||||
/**
|
||||
* DOC: ACK rates
|
||||
*
|
||||
* AR5212+ can use higher rates for ack transmission
|
||||
* based on current tx rate instead of the base rate.
|
||||
* It does this to better utilize channel usage.
|
||||
* This is a mapping between G rates (that cover both
|
||||
* There is a mapping between G rates (that cover both
|
||||
* CCK and OFDM) and ack rates that we use when setting
|
||||
* rate -> duration table. This mapping is hw-based so
|
||||
* don't change anything.
|
||||
@@ -63,17 +99,18 @@ static const unsigned int ack_rates_high[] =
|
||||
\*******************/
|
||||
|
||||
/**
|
||||
* ath5k_hw_get_frame_duration - Get tx time of a frame
|
||||
*
|
||||
* ath5k_hw_get_frame_duration() - Get tx time of a frame
|
||||
* @ah: The &struct ath5k_hw
|
||||
* @len: Frame's length in bytes
|
||||
* @rate: The @struct ieee80211_rate
|
||||
* @shortpre: Indicate short preample
|
||||
*
|
||||
* Calculate tx duration of a frame given it's rate and length
|
||||
* It extends ieee80211_generic_frame_duration for non standard
|
||||
* bwmodes.
|
||||
*/
|
||||
int ath5k_hw_get_frame_duration(struct ath5k_hw *ah,
|
||||
int
|
||||
ath5k_hw_get_frame_duration(struct ath5k_hw *ah,
|
||||
int len, struct ieee80211_rate *rate, bool shortpre)
|
||||
{
|
||||
int sifs, preamble, plcp_bits, sym_time;
|
||||
@@ -129,11 +166,11 @@ int ath5k_hw_get_frame_duration(struct ath5k_hw *ah,
|
||||
}
|
||||
|
||||
/**
|
||||
* ath5k_hw_get_default_slottime - Get the default slot time for current mode
|
||||
*
|
||||
* ath5k_hw_get_default_slottime() - Get the default slot time for current mode
|
||||
* @ah: The &struct ath5k_hw
|
||||
*/
|
||||
unsigned int ath5k_hw_get_default_slottime(struct ath5k_hw *ah)
|
||||
unsigned int
|
||||
ath5k_hw_get_default_slottime(struct ath5k_hw *ah)
|
||||
{
|
||||
struct ieee80211_channel *channel = ah->ah_current_channel;
|
||||
unsigned int slot_time;
|
||||
@@ -160,11 +197,11 @@ unsigned int ath5k_hw_get_default_slottime(struct ath5k_hw *ah)
|
||||
}
|
||||
|
||||
/**
|
||||
* ath5k_hw_get_default_sifs - Get the default SIFS for current mode
|
||||
*
|
||||
* ath5k_hw_get_default_sifs() - Get the default SIFS for current mode
|
||||
* @ah: The &struct ath5k_hw
|
||||
*/
|
||||
unsigned int ath5k_hw_get_default_sifs(struct ath5k_hw *ah)
|
||||
unsigned int
|
||||
ath5k_hw_get_default_sifs(struct ath5k_hw *ah)
|
||||
{
|
||||
struct ieee80211_channel *channel = ah->ah_current_channel;
|
||||
unsigned int sifs;
|
||||
@@ -191,17 +228,17 @@ unsigned int ath5k_hw_get_default_sifs(struct ath5k_hw *ah)
|
||||
}
|
||||
|
||||
/**
|
||||
* ath5k_hw_update_mib_counters - Update MIB counters (mac layer statistics)
|
||||
*
|
||||
* ath5k_hw_update_mib_counters() - Update MIB counters (mac layer statistics)
|
||||
* @ah: The &struct ath5k_hw
|
||||
*
|
||||
* Reads MIB counters from PCU and updates sw statistics. Is called after a
|
||||
* MIB interrupt, because one of these counters might have reached their maximum
|
||||
* and triggered the MIB interrupt, to let us read and clear the counter.
|
||||
*
|
||||
* Is called in interrupt context!
|
||||
* NOTE: Is called in interrupt context!
|
||||
*/
|
||||
void ath5k_hw_update_mib_counters(struct ath5k_hw *ah)
|
||||
void
|
||||
ath5k_hw_update_mib_counters(struct ath5k_hw *ah)
|
||||
{
|
||||
struct ath5k_statistics *stats = &ah->stats;
|
||||
|
||||
@@ -219,10 +256,8 @@ void ath5k_hw_update_mib_counters(struct ath5k_hw *ah)
|
||||
\******************/
|
||||
|
||||
/**
|
||||
* ath5k_hw_write_rate_duration - fill rate code to duration table
|
||||
*
|
||||
* @ah: the &struct ath5k_hw
|
||||
* @mode: one of enum ath5k_driver_mode
|
||||
* ath5k_hw_write_rate_duration() - Fill rate code to duration table
|
||||
* @ah: The &struct ath5k_hw
|
||||
*
|
||||
* Write the rate code to duration table upon hw reset. This is a helper for
|
||||
* ath5k_hw_pcu_init(). It seems all this is doing is setting an ACK timeout on
|
||||
@@ -236,7 +271,8 @@ void ath5k_hw_update_mib_counters(struct ath5k_hw *ah)
|
||||
* that include all OFDM and CCK rates.
|
||||
*
|
||||
*/
|
||||
static inline void ath5k_hw_write_rate_duration(struct ath5k_hw *ah)
|
||||
static inline void
|
||||
ath5k_hw_write_rate_duration(struct ath5k_hw *ah)
|
||||
{
|
||||
struct ieee80211_rate *rate;
|
||||
unsigned int i;
|
||||
@@ -280,12 +316,12 @@ static inline void ath5k_hw_write_rate_duration(struct ath5k_hw *ah)
|
||||
}
|
||||
|
||||
/**
|
||||
* ath5k_hw_set_ack_timeout - Set ACK timeout on PCU
|
||||
*
|
||||
* ath5k_hw_set_ack_timeout() - Set ACK timeout on PCU
|
||||
* @ah: The &struct ath5k_hw
|
||||
* @timeout: Timeout in usec
|
||||
*/
|
||||
static int ath5k_hw_set_ack_timeout(struct ath5k_hw *ah, unsigned int timeout)
|
||||
static int
|
||||
ath5k_hw_set_ack_timeout(struct ath5k_hw *ah, unsigned int timeout)
|
||||
{
|
||||
if (ath5k_hw_clocktoh(ah, AR5K_REG_MS(0xffffffff, AR5K_TIME_OUT_ACK))
|
||||
<= timeout)
|
||||
@@ -298,12 +334,12 @@ static int ath5k_hw_set_ack_timeout(struct ath5k_hw *ah, unsigned int timeout)
|
||||
}
|
||||
|
||||
/**
|
||||
* ath5k_hw_set_cts_timeout - Set CTS timeout on PCU
|
||||
*
|
||||
* ath5k_hw_set_cts_timeout() - Set CTS timeout on PCU
|
||||
* @ah: The &struct ath5k_hw
|
||||
* @timeout: Timeout in usec
|
||||
*/
|
||||
static int ath5k_hw_set_cts_timeout(struct ath5k_hw *ah, unsigned int timeout)
|
||||
static int
|
||||
ath5k_hw_set_cts_timeout(struct ath5k_hw *ah, unsigned int timeout)
|
||||
{
|
||||
if (ath5k_hw_clocktoh(ah, AR5K_REG_MS(0xffffffff, AR5K_TIME_OUT_CTS))
|
||||
<= timeout)
|
||||
@@ -321,14 +357,14 @@ static int ath5k_hw_set_cts_timeout(struct ath5k_hw *ah, unsigned int timeout)
|
||||
\*******************/
|
||||
|
||||
/**
|
||||
* ath5k_hw_set_lladdr - Set station id
|
||||
*
|
||||
* ath5k_hw_set_lladdr() - Set station id
|
||||
* @ah: The &struct ath5k_hw
|
||||
* @mac: The card's mac address
|
||||
* @mac: The card's mac address (array of octets)
|
||||
*
|
||||
* Set station id on hw using the provided mac address
|
||||
*/
|
||||
int ath5k_hw_set_lladdr(struct ath5k_hw *ah, const u8 *mac)
|
||||
int
|
||||
ath5k_hw_set_lladdr(struct ath5k_hw *ah, const u8 *mac)
|
||||
{
|
||||
struct ath_common *common = ath5k_hw_common(ah);
|
||||
u32 low_id, high_id;
|
||||
@@ -349,14 +385,14 @@ int ath5k_hw_set_lladdr(struct ath5k_hw *ah, const u8 *mac)
|
||||
}
|
||||
|
||||
/**
|
||||
* ath5k_hw_set_bssid - Set current BSSID on hw
|
||||
*
|
||||
* ath5k_hw_set_bssid() - Set current BSSID on hw
|
||||
* @ah: The &struct ath5k_hw
|
||||
*
|
||||
* Sets the current BSSID and BSSID mask we have from the
|
||||
* common struct into the hardware
|
||||
*/
|
||||
void ath5k_hw_set_bssid(struct ath5k_hw *ah)
|
||||
void
|
||||
ath5k_hw_set_bssid(struct ath5k_hw *ah)
|
||||
{
|
||||
struct ath_common *common = ath5k_hw_common(ah);
|
||||
u16 tim_offset = 0;
|
||||
@@ -389,7 +425,23 @@ void ath5k_hw_set_bssid(struct ath5k_hw *ah)
|
||||
ath5k_hw_enable_pspoll(ah, NULL, 0);
|
||||
}
|
||||
|
||||
void ath5k_hw_set_bssid_mask(struct ath5k_hw *ah, const u8 *mask)
|
||||
/**
|
||||
* ath5k_hw_set_bssid_mask() - Filter out bssids we listen
|
||||
* @ah: The &struct ath5k_hw
|
||||
* @mask: The BSSID mask to set (array of octets)
|
||||
*
|
||||
* BSSID masking is a method used by AR5212 and newer hardware to inform PCU
|
||||
* which bits of the interface's MAC address should be looked at when trying
|
||||
* to decide which packets to ACK. In station mode and AP mode with a single
|
||||
* BSS every bit matters since we lock to only one BSS. In AP mode with
|
||||
* multiple BSSes (virtual interfaces) not every bit matters because hw must
|
||||
* accept frames for all BSSes and so we tweak some bits of our mac address
|
||||
* in order to have multiple BSSes.
|
||||
*
|
||||
* For more information check out ../hw.c of the common ath module.
|
||||
*/
|
||||
void
|
||||
ath5k_hw_set_bssid_mask(struct ath5k_hw *ah, const u8 *mask)
|
||||
{
|
||||
struct ath_common *common = ath5k_hw_common(ah);
|
||||
|
||||
@@ -400,18 +452,21 @@ void ath5k_hw_set_bssid_mask(struct ath5k_hw *ah, const u8 *mask)
|
||||
ath_hw_setbssidmask(common);
|
||||
}
|
||||
|
||||
/*
|
||||
* Set multicast filter
|
||||
/**
|
||||
* ath5k_hw_set_mcast_filter() - Set multicast filter
|
||||
* @ah: The &struct ath5k_hw
|
||||
* @filter0: Lower 32bits of muticast filter
|
||||
* @filter1: Higher 16bits of multicast filter
|
||||
*/
|
||||
void ath5k_hw_set_mcast_filter(struct ath5k_hw *ah, u32 filter0, u32 filter1)
|
||||
void
|
||||
ath5k_hw_set_mcast_filter(struct ath5k_hw *ah, u32 filter0, u32 filter1)
|
||||
{
|
||||
ath5k_hw_reg_write(ah, filter0, AR5K_MCAST_FILTER0);
|
||||
ath5k_hw_reg_write(ah, filter1, AR5K_MCAST_FILTER1);
|
||||
}
|
||||
|
||||
/**
|
||||
* ath5k_hw_get_rx_filter - Get current rx filter
|
||||
*
|
||||
* ath5k_hw_get_rx_filter() - Get current rx filter
|
||||
* @ah: The &struct ath5k_hw
|
||||
*
|
||||
* Returns the RX filter by reading rx filter and
|
||||
@@ -420,7 +475,8 @@ void ath5k_hw_set_mcast_filter(struct ath5k_hw *ah, u32 filter0, u32 filter1)
|
||||
* and pass to the driver. For a list of frame types
|
||||
* check out reg.h.
|
||||
*/
|
||||
u32 ath5k_hw_get_rx_filter(struct ath5k_hw *ah)
|
||||
u32
|
||||
ath5k_hw_get_rx_filter(struct ath5k_hw *ah)
|
||||
{
|
||||
u32 data, filter = 0;
|
||||
|
||||
@@ -440,8 +496,7 @@ u32 ath5k_hw_get_rx_filter(struct ath5k_hw *ah)
|
||||
}
|
||||
|
||||
/**
|
||||
* ath5k_hw_set_rx_filter - Set rx filter
|
||||
*
|
||||
* ath5k_hw_set_rx_filter() - Set rx filter
|
||||
* @ah: The &struct ath5k_hw
|
||||
* @filter: RX filter mask (see reg.h)
|
||||
*
|
||||
@@ -449,7 +504,8 @@ u32 ath5k_hw_get_rx_filter(struct ath5k_hw *ah)
|
||||
* register on 5212 and newer chips so that we have proper PHY
|
||||
* error reporting.
|
||||
*/
|
||||
void ath5k_hw_set_rx_filter(struct ath5k_hw *ah, u32 filter)
|
||||
void
|
||||
ath5k_hw_set_rx_filter(struct ath5k_hw *ah, u32 filter)
|
||||
{
|
||||
u32 data = 0;
|
||||
|
||||
@@ -493,13 +549,13 @@ void ath5k_hw_set_rx_filter(struct ath5k_hw *ah, u32 filter)
|
||||
#define ATH5K_MAX_TSF_READ 10
|
||||
|
||||
/**
|
||||
* ath5k_hw_get_tsf64 - Get the full 64bit TSF
|
||||
*
|
||||
* ath5k_hw_get_tsf64() - Get the full 64bit TSF
|
||||
* @ah: The &struct ath5k_hw
|
||||
*
|
||||
* Returns the current TSF
|
||||
*/
|
||||
u64 ath5k_hw_get_tsf64(struct ath5k_hw *ah)
|
||||
u64
|
||||
ath5k_hw_get_tsf64(struct ath5k_hw *ah)
|
||||
{
|
||||
u32 tsf_lower, tsf_upper1, tsf_upper2;
|
||||
int i;
|
||||
@@ -536,28 +592,30 @@ u64 ath5k_hw_get_tsf64(struct ath5k_hw *ah)
|
||||
return ((u64)tsf_upper1 << 32) | tsf_lower;
|
||||
}
|
||||
|
||||
#undef ATH5K_MAX_TSF_READ
|
||||
|
||||
/**
|
||||
* ath5k_hw_set_tsf64 - Set a new 64bit TSF
|
||||
*
|
||||
* ath5k_hw_set_tsf64() - Set a new 64bit TSF
|
||||
* @ah: The &struct ath5k_hw
|
||||
* @tsf64: The new 64bit TSF
|
||||
*
|
||||
* Sets the new TSF
|
||||
*/
|
||||
void ath5k_hw_set_tsf64(struct ath5k_hw *ah, u64 tsf64)
|
||||
void
|
||||
ath5k_hw_set_tsf64(struct ath5k_hw *ah, u64 tsf64)
|
||||
{
|
||||
ath5k_hw_reg_write(ah, tsf64 & 0xffffffff, AR5K_TSF_L32);
|
||||
ath5k_hw_reg_write(ah, (tsf64 >> 32) & 0xffffffff, AR5K_TSF_U32);
|
||||
}
|
||||
|
||||
/**
|
||||
* ath5k_hw_reset_tsf - Force a TSF reset
|
||||
*
|
||||
* ath5k_hw_reset_tsf() - Force a TSF reset
|
||||
* @ah: The &struct ath5k_hw
|
||||
*
|
||||
* Forces a TSF reset on PCU
|
||||
*/
|
||||
void ath5k_hw_reset_tsf(struct ath5k_hw *ah)
|
||||
void
|
||||
ath5k_hw_reset_tsf(struct ath5k_hw *ah)
|
||||
{
|
||||
u32 val;
|
||||
|
||||
@@ -573,10 +631,17 @@ void ath5k_hw_reset_tsf(struct ath5k_hw *ah)
|
||||
ath5k_hw_reg_write(ah, val, AR5K_BEACON);
|
||||
}
|
||||
|
||||
/*
|
||||
* Initialize beacon timers
|
||||
/**
|
||||
* ath5k_hw_init_beacon_timers() - Initialize beacon timers
|
||||
* @ah: The &struct ath5k_hw
|
||||
* @next_beacon: Next TBTT
|
||||
* @interval: Current beacon interval
|
||||
*
|
||||
* This function is used to initialize beacon timers based on current
|
||||
* operation mode and settings.
|
||||
*/
|
||||
void ath5k_hw_init_beacon(struct ath5k_hw *ah, u32 next_beacon, u32 interval)
|
||||
void
|
||||
ath5k_hw_init_beacon_timers(struct ath5k_hw *ah, u32 next_beacon, u32 interval)
|
||||
{
|
||||
u32 timer1, timer2, timer3;
|
||||
|
||||
@@ -655,8 +720,7 @@ void ath5k_hw_init_beacon(struct ath5k_hw *ah, u32 next_beacon, u32 interval)
|
||||
}
|
||||
|
||||
/**
|
||||
* ath5k_check_timer_win - Check if timer B is timer A + window
|
||||
*
|
||||
* ath5k_check_timer_win() - Check if timer B is timer A + window
|
||||
* @a: timer a (before b)
|
||||
* @b: timer b (after a)
|
||||
* @window: difference between a and b
|
||||
@@ -686,12 +750,11 @@ ath5k_check_timer_win(int a, int b, int window, int intval)
|
||||
}
|
||||
|
||||
/**
|
||||
* ath5k_hw_check_beacon_timers - Check if the beacon timers are correct
|
||||
*
|
||||
* ath5k_hw_check_beacon_timers() - Check if the beacon timers are correct
|
||||
* @ah: The &struct ath5k_hw
|
||||
* @intval: beacon interval
|
||||
*
|
||||
* This is a workaround for IBSS mode:
|
||||
* This is a workaround for IBSS mode
|
||||
*
|
||||
* The need for this function arises from the fact that we have 4 separate
|
||||
* HW timer registers (TIMER0 - TIMER3), which are closely related to the
|
||||
@@ -746,14 +809,14 @@ ath5k_hw_check_beacon_timers(struct ath5k_hw *ah, int intval)
|
||||
}
|
||||
|
||||
/**
|
||||
* ath5k_hw_set_coverage_class - Set IEEE 802.11 coverage class
|
||||
*
|
||||
* ath5k_hw_set_coverage_class() - Set IEEE 802.11 coverage class
|
||||
* @ah: The &struct ath5k_hw
|
||||
* @coverage_class: IEEE 802.11 coverage class number
|
||||
*
|
||||
* Sets IFS intervals and ACK/CTS timeouts for given coverage class.
|
||||
*/
|
||||
void ath5k_hw_set_coverage_class(struct ath5k_hw *ah, u8 coverage_class)
|
||||
void
|
||||
ath5k_hw_set_coverage_class(struct ath5k_hw *ah, u8 coverage_class)
|
||||
{
|
||||
/* As defined by IEEE 802.11-2007 17.3.8.6 */
|
||||
int slot_time = ath5k_hw_get_default_slottime(ah) + 3 * coverage_class;
|
||||
@@ -772,8 +835,7 @@ void ath5k_hw_set_coverage_class(struct ath5k_hw *ah, u8 coverage_class)
|
||||
\***************************/
|
||||
|
||||
/**
|
||||
* ath5k_hw_start_rx_pcu - Start RX engine
|
||||
*
|
||||
* ath5k_hw_start_rx_pcu() - Start RX engine
|
||||
* @ah: The &struct ath5k_hw
|
||||
*
|
||||
* Starts RX engine on PCU so that hw can process RXed frames
|
||||
@@ -781,32 +843,33 @@ void ath5k_hw_set_coverage_class(struct ath5k_hw *ah, u8 coverage_class)
|
||||
*
|
||||
* NOTE: RX DMA should be already enabled using ath5k_hw_start_rx_dma
|
||||
*/
|
||||
void ath5k_hw_start_rx_pcu(struct ath5k_hw *ah)
|
||||
void
|
||||
ath5k_hw_start_rx_pcu(struct ath5k_hw *ah)
|
||||
{
|
||||
AR5K_REG_DISABLE_BITS(ah, AR5K_DIAG_SW, AR5K_DIAG_SW_DIS_RX);
|
||||
}
|
||||
|
||||
/**
|
||||
* at5k_hw_stop_rx_pcu - Stop RX engine
|
||||
*
|
||||
* at5k_hw_stop_rx_pcu() - Stop RX engine
|
||||
* @ah: The &struct ath5k_hw
|
||||
*
|
||||
* Stops RX engine on PCU
|
||||
*/
|
||||
void ath5k_hw_stop_rx_pcu(struct ath5k_hw *ah)
|
||||
void
|
||||
ath5k_hw_stop_rx_pcu(struct ath5k_hw *ah)
|
||||
{
|
||||
AR5K_REG_ENABLE_BITS(ah, AR5K_DIAG_SW, AR5K_DIAG_SW_DIS_RX);
|
||||
}
|
||||
|
||||
/**
|
||||
* ath5k_hw_set_opmode - Set PCU operating mode
|
||||
*
|
||||
* ath5k_hw_set_opmode() - Set PCU operating mode
|
||||
* @ah: The &struct ath5k_hw
|
||||
* @op_mode: &enum nl80211_iftype operating mode
|
||||
* @op_mode: One of enum nl80211_iftype
|
||||
*
|
||||
* Configure PCU for the various operating modes (AP/STA etc)
|
||||
*/
|
||||
int ath5k_hw_set_opmode(struct ath5k_hw *ah, enum nl80211_iftype op_mode)
|
||||
int
|
||||
ath5k_hw_set_opmode(struct ath5k_hw *ah, enum nl80211_iftype op_mode)
|
||||
{
|
||||
struct ath_common *common = ath5k_hw_common(ah);
|
||||
u32 pcu_reg, beacon_reg, low_id, high_id;
|
||||
@@ -873,8 +936,17 @@ int ath5k_hw_set_opmode(struct ath5k_hw *ah, enum nl80211_iftype op_mode)
|
||||
return 0;
|
||||
}
|
||||
|
||||
void ath5k_hw_pcu_init(struct ath5k_hw *ah, enum nl80211_iftype op_mode,
|
||||
u8 mode)
|
||||
/**
|
||||
* ath5k_hw_pcu_init() - Initialize PCU
|
||||
* @ah: The &struct ath5k_hw
|
||||
* @op_mode: One of enum nl80211_iftype
|
||||
* @mode: One of enum ath5k_driver_mode
|
||||
*
|
||||
* This function is used to initialize PCU by setting current
|
||||
* operation mode and various other settings.
|
||||
*/
|
||||
void
|
||||
ath5k_hw_pcu_init(struct ath5k_hw *ah, enum nl80211_iftype op_mode)
|
||||
{
|
||||
/* Set bssid and bssid mask */
|
||||
ath5k_hw_set_bssid(ah);
|
||||
|
||||
Fai riferimento in un nuovo problema
Block a user