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drm/tegra: Add Tegra186 display hub support

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The display architecture has changed in several significant ways with
the new Tegra186 SoC. Shared between all display controllers is a set
of common resources referred to as the display hub. The hub generates
accesses to memory and feeds them into various composition pipelines,
each of which being a window that can be assigned to arbitrary heads.

Atomic state is subclassed in order to track the global bandwidth
requirements and select and adjust the hub clocks appropriately. The
plane code is shared to a large degree with earlier SoC generations,
except where the programming differs.

Signed-off-by: Thierry Reding <treding@nvidia.com>
This commit is contained in:
Thierry Reding
2017-11-13 11:08:13 +01:00
parent 5acd351427
commit c4755fb906
8 changed files with 1103 additions and 3 deletions
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2
drivers/gpu/drm/tegra/plane.h
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@@ -15,7 +15,9 @@ struct tegra_bo;
struct tegra_plane {
struct drm_plane base;
unsigned int offset;
unsigned int index;
unsigned int depth;
};
struct tegra_cursor {