powerpc/dart: Use a cachable DART
Instead of punching a hole in the linear mapping, just use normal cachable memory, and apply the flush sequence documented in the CPC625 (aka U3) user manual. This allows us to remove quite a bit of code related to the early allocation of the DART and the hole in the linear mapping. We can also get rid of the copy of the DART for suspend/resume as the original memory can just be saved/restored now, as long as we properly sync the caches. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> [mpe: Integrate dart_init() fix to return ENODEV when DART disabled] Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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Michael Ellerman

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@@ -305,13 +305,6 @@ static int __init maple_probe(void)
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if (!of_flat_dt_is_compatible(root, "Momentum,Maple") &&
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!of_flat_dt_is_compatible(root, "Momentum,Apache"))
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return 0;
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/*
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* On U3, the DART (iommu) must be allocated now since it
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* has an impact on htab_initialize (due to the large page it
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* occupies having to be broken up so the DART itself is not
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* part of the cacheable linar mapping
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*/
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alloc_dart_table();
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hpte_init_native();
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pm_power_off = maple_power_off;
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@@ -607,14 +607,6 @@ static int __init pmac_probe(void)
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return 0;
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#ifdef CONFIG_PPC64
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/*
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* On U3, the DART (iommu) must be allocated now since it
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* has an impact on htab_initialize (due to the large page it
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* occupies having to be broken up so the DART itself is not
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* part of the cacheable linar mapping
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*/
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alloc_dart_table();
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hpte_init_native();
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#endif
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