sh: Don't set sh-sci pdata scscr TE and RE bits

The bits are set by the driver internally, don't set them in platform
data.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Laurent Pinchart
2017-01-11 16:43:25 +02:00
committed by Greg Kroah-Hartman
parent 3d73f32bfa
commit c3fa400b27
28 changed files with 103 additions and 135 deletions

View File

@@ -62,7 +62,7 @@ static DECLARE_INTC_DESC(intc_desc, "sh7619", vectors, NULL,
static struct plat_sci_port scif0_platform_data = { static struct plat_sci_port scif0_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scscr = SCSCR_REIE,
.type = PORT_SCIF, .type = PORT_SCIF,
}; };
@@ -83,7 +83,7 @@ static struct platform_device scif0_device = {
static struct plat_sci_port scif1_platform_data = { static struct plat_sci_port scif1_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scscr = SCSCR_REIE,
.type = PORT_SCIF, .type = PORT_SCIF,
}; };
@@ -104,7 +104,7 @@ static struct platform_device scif1_device = {
static struct plat_sci_port scif2_platform_data = { static struct plat_sci_port scif2_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scscr = SCSCR_REIE,
.type = PORT_SCIF, .type = PORT_SCIF,
}; };

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@@ -130,7 +130,7 @@ static struct platform_device mtu2_device = {
static struct plat_sci_port scif0_platform_data = { static struct plat_sci_port scif0_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scscr = SCSCR_REIE,
.type = PORT_SCIF, .type = PORT_SCIF,
}; };

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@@ -179,7 +179,7 @@ static DECLARE_INTC_DESC(intc_desc, "sh7201", vectors, groups,
static struct plat_sci_port scif0_platform_data = { static struct plat_sci_port scif0_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scscr = SCSCR_REIE,
.type = PORT_SCIF, .type = PORT_SCIF,
}; };
@@ -200,7 +200,7 @@ static struct platform_device scif0_device = {
static struct plat_sci_port scif1_platform_data = { static struct plat_sci_port scif1_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scscr = SCSCR_REIE,
.type = PORT_SCIF, .type = PORT_SCIF,
}; };
@@ -221,7 +221,7 @@ static struct platform_device scif1_device = {
static struct plat_sci_port scif2_platform_data = { static struct plat_sci_port scif2_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scscr = SCSCR_REIE,
.type = PORT_SCIF, .type = PORT_SCIF,
}; };
@@ -242,7 +242,7 @@ static struct platform_device scif2_device = {
static struct plat_sci_port scif3_platform_data = { static struct plat_sci_port scif3_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scscr = SCSCR_REIE,
.type = PORT_SCIF, .type = PORT_SCIF,
}; };
@@ -263,7 +263,7 @@ static struct platform_device scif3_device = {
static struct plat_sci_port scif4_platform_data = { static struct plat_sci_port scif4_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scscr = SCSCR_REIE,
.type = PORT_SCIF, .type = PORT_SCIF,
}; };
@@ -284,7 +284,7 @@ static struct platform_device scif4_device = {
static struct plat_sci_port scif5_platform_data = { static struct plat_sci_port scif5_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scscr = SCSCR_REIE,
.type = PORT_SCIF, .type = PORT_SCIF,
}; };
@@ -305,7 +305,7 @@ static struct platform_device scif5_device = {
static struct plat_sci_port scif6_platform_data = { static struct plat_sci_port scif6_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scscr = SCSCR_REIE,
.type = PORT_SCIF, .type = PORT_SCIF,
}; };
@@ -326,7 +326,7 @@ static struct platform_device scif6_device = {
static struct plat_sci_port scif7_platform_data = { static struct plat_sci_port scif7_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scscr = SCSCR_REIE,
.type = PORT_SCIF, .type = PORT_SCIF,
}; };

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@@ -175,8 +175,7 @@ static DECLARE_INTC_DESC(intc_desc, "sh7203", vectors, groups,
static struct plat_sci_port scif0_platform_data = { static struct plat_sci_port scif0_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE | .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_REIE,
SCSCR_REIE,
.type = PORT_SCIF, .type = PORT_SCIF,
.regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE, .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE,
}; };
@@ -198,8 +197,7 @@ static struct platform_device scif0_device = {
static struct plat_sci_port scif1_platform_data = { static struct plat_sci_port scif1_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE | .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_REIE,
SCSCR_REIE,
.type = PORT_SCIF, .type = PORT_SCIF,
.regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE, .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE,
}; };
@@ -221,8 +219,7 @@ static struct platform_device scif1_device = {
static struct plat_sci_port scif2_platform_data = { static struct plat_sci_port scif2_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE | .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_REIE,
SCSCR_REIE,
.type = PORT_SCIF, .type = PORT_SCIF,
.regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE, .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE,
}; };
@@ -244,8 +241,7 @@ static struct platform_device scif2_device = {
static struct plat_sci_port scif3_platform_data = { static struct plat_sci_port scif3_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE | .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_REIE,
SCSCR_REIE,
.type = PORT_SCIF, .type = PORT_SCIF,
.regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE, .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE,
}; };

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@@ -135,7 +135,7 @@ static DECLARE_INTC_DESC(intc_desc, "sh7206", vectors, groups,
static struct plat_sci_port scif0_platform_data = { static struct plat_sci_port scif0_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scscr = SCSCR_REIE,
.type = PORT_SCIF, .type = PORT_SCIF,
}; };
@@ -156,7 +156,7 @@ static struct platform_device scif0_device = {
static struct plat_sci_port scif1_platform_data = { static struct plat_sci_port scif1_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scscr = SCSCR_REIE,
.type = PORT_SCIF, .type = PORT_SCIF,
}; };
@@ -177,7 +177,7 @@ static struct platform_device scif1_device = {
static struct plat_sci_port scif2_platform_data = { static struct plat_sci_port scif2_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scscr = SCSCR_REIE,
.type = PORT_SCIF, .type = PORT_SCIF,
}; };
@@ -198,7 +198,7 @@ static struct platform_device scif2_device = {
static struct plat_sci_port scif3_platform_data = { static struct plat_sci_port scif3_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scscr = SCSCR_REIE,
.type = PORT_SCIF, .type = PORT_SCIF,
}; };

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@@ -227,8 +227,7 @@ static DECLARE_INTC_DESC(intc_desc, "sh7264", vectors, groups,
static struct plat_sci_port scif0_platform_data = { static struct plat_sci_port scif0_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE | .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_REIE | SCSCR_TOIE,
SCSCR_REIE | SCSCR_TOIE,
.type = PORT_SCIF, .type = PORT_SCIF,
.regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE, .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE,
}; };
@@ -253,8 +252,7 @@ static struct platform_device scif0_device = {
static struct plat_sci_port scif1_platform_data = { static struct plat_sci_port scif1_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE | .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_REIE | SCSCR_TOIE,
SCSCR_REIE | SCSCR_TOIE,
.type = PORT_SCIF, .type = PORT_SCIF,
.regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE, .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE,
}; };
@@ -279,8 +277,7 @@ static struct platform_device scif1_device = {
static struct plat_sci_port scif2_platform_data = { static struct plat_sci_port scif2_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE | .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_REIE | SCSCR_TOIE,
SCSCR_REIE | SCSCR_TOIE,
.type = PORT_SCIF, .type = PORT_SCIF,
.regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE, .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE,
}; };
@@ -305,8 +302,7 @@ static struct platform_device scif2_device = {
static struct plat_sci_port scif3_platform_data = { static struct plat_sci_port scif3_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE | .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_REIE | SCSCR_TOIE,
SCSCR_REIE | SCSCR_TOIE,
.type = PORT_SCIF, .type = PORT_SCIF,
.regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE, .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE,
}; };
@@ -331,8 +327,7 @@ static struct platform_device scif3_device = {
static struct plat_sci_port scif4_platform_data = { static struct plat_sci_port scif4_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE | .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_REIE | SCSCR_TOIE,
SCSCR_REIE | SCSCR_TOIE,
.type = PORT_SCIF, .type = PORT_SCIF,
.regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE, .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE,
}; };
@@ -357,8 +352,7 @@ static struct platform_device scif4_device = {
static struct plat_sci_port scif5_platform_data = { static struct plat_sci_port scif5_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE | .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_REIE | SCSCR_TOIE,
SCSCR_REIE | SCSCR_TOIE,
.type = PORT_SCIF, .type = PORT_SCIF,
.regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE, .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE,
}; };
@@ -383,8 +377,7 @@ static struct platform_device scif5_device = {
static struct plat_sci_port scif6_platform_data = { static struct plat_sci_port scif6_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE | .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_REIE | SCSCR_TOIE,
SCSCR_REIE | SCSCR_TOIE,
.type = PORT_SCIF, .type = PORT_SCIF,
.regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE, .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE,
}; };
@@ -409,8 +402,7 @@ static struct platform_device scif6_device = {
static struct plat_sci_port scif7_platform_data = { static struct plat_sci_port scif7_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE | .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_REIE | SCSCR_TOIE,
SCSCR_REIE | SCSCR_TOIE,
.type = PORT_SCIF, .type = PORT_SCIF,
.regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE, .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE,
}; };

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@@ -249,8 +249,7 @@ static DECLARE_INTC_DESC(intc_desc, "sh7269", vectors, groups,
static struct plat_sci_port scif0_platform_data = { static struct plat_sci_port scif0_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE | .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_REIE | SCSCR_TOIE,
SCSCR_REIE | SCSCR_TOIE,
.type = PORT_SCIF, .type = PORT_SCIF,
.regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE, .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE,
}; };
@@ -275,8 +274,7 @@ static struct platform_device scif0_device = {
static struct plat_sci_port scif1_platform_data = { static struct plat_sci_port scif1_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE | .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_REIE | SCSCR_TOIE,
SCSCR_REIE | SCSCR_TOIE,
.type = PORT_SCIF, .type = PORT_SCIF,
.regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE, .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE,
}; };
@@ -301,8 +299,7 @@ static struct platform_device scif1_device = {
static struct plat_sci_port scif2_platform_data = { static struct plat_sci_port scif2_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE | .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_REIE | SCSCR_TOIE,
SCSCR_REIE | SCSCR_TOIE,
.type = PORT_SCIF, .type = PORT_SCIF,
.regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE, .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE,
}; };
@@ -327,8 +324,7 @@ static struct platform_device scif2_device = {
static struct plat_sci_port scif3_platform_data = { static struct plat_sci_port scif3_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE | .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_REIE | SCSCR_TOIE,
SCSCR_REIE | SCSCR_TOIE,
.type = PORT_SCIF, .type = PORT_SCIF,
.regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE, .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE,
}; };
@@ -353,8 +349,7 @@ static struct platform_device scif3_device = {
static struct plat_sci_port scif4_platform_data = { static struct plat_sci_port scif4_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE | .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_REIE | SCSCR_TOIE,
SCSCR_REIE | SCSCR_TOIE,
.type = PORT_SCIF, .type = PORT_SCIF,
.regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE, .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE,
}; };
@@ -379,8 +374,7 @@ static struct platform_device scif4_device = {
static struct plat_sci_port scif5_platform_data = { static struct plat_sci_port scif5_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE | .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_REIE | SCSCR_TOIE,
SCSCR_REIE | SCSCR_TOIE,
.type = PORT_SCIF, .type = PORT_SCIF,
.regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE, .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE,
}; };
@@ -405,8 +399,7 @@ static struct platform_device scif5_device = {
static struct plat_sci_port scif6_platform_data = { static struct plat_sci_port scif6_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE | .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_REIE | SCSCR_TOIE,
SCSCR_REIE | SCSCR_TOIE,
.type = PORT_SCIF, .type = PORT_SCIF,
.regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE, .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE,
}; };
@@ -431,8 +424,7 @@ static struct platform_device scif6_device = {
static struct plat_sci_port scif7_platform_data = { static struct plat_sci_port scif7_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE | .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_REIE | SCSCR_TOIE,
SCSCR_REIE | SCSCR_TOIE,
.type = PORT_SCIF, .type = PORT_SCIF,
.regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE, .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE,
}; };

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@@ -71,8 +71,7 @@ static DECLARE_INTC_DESC(intc_desc, "sh7705", vectors, NULL,
static struct plat_sci_port scif0_platform_data = { static struct plat_sci_port scif0_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_TIE | SCSCR_RIE | SCSCR_TE | .scscr = SCSCR_TIE | SCSCR_RIE | SCSCR_CKE1 | SCSCR_CKE0,
SCSCR_RE | SCSCR_CKE1 | SCSCR_CKE0,
.type = PORT_SCIF, .type = PORT_SCIF,
.ops = &sh770x_sci_port_ops, .ops = &sh770x_sci_port_ops,
.regtype = SCIx_SH7705_SCIF_REGTYPE, .regtype = SCIx_SH7705_SCIF_REGTYPE,
@@ -95,7 +94,7 @@ static struct platform_device scif0_device = {
static struct plat_sci_port scif1_platform_data = { static struct plat_sci_port scif1_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_TIE | SCSCR_RIE | SCSCR_TE | SCSCR_RE, .scscr = SCSCR_TIE | SCSCR_RIE,
.type = PORT_SCIF, .type = PORT_SCIF,
.ops = &sh770x_sci_port_ops, .ops = &sh770x_sci_port_ops,
.regtype = SCIx_SH7705_SCIF_REGTYPE, .regtype = SCIx_SH7705_SCIF_REGTYPE,

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@@ -111,7 +111,6 @@ static struct platform_device rtc_device = {
static struct plat_sci_port scif0_platform_data = { static struct plat_sci_port scif0_platform_data = {
.port_reg = 0xa4000136, .port_reg = 0xa4000136,
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_TE | SCSCR_RE,
.type = PORT_SCI, .type = PORT_SCI,
.ops = &sh770x_sci_port_ops, .ops = &sh770x_sci_port_ops,
.regshift = 1, .regshift = 1,
@@ -136,7 +135,6 @@ static struct platform_device scif0_device = {
defined(CONFIG_CPU_SUBTYPE_SH7709) defined(CONFIG_CPU_SUBTYPE_SH7709)
static struct plat_sci_port scif1_platform_data = { static struct plat_sci_port scif1_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_TE | SCSCR_RE,
.type = PORT_SCIF, .type = PORT_SCIF,
.ops = &sh770x_sci_port_ops, .ops = &sh770x_sci_port_ops,
.regtype = SCIx_SH3_SCIF_REGTYPE, .regtype = SCIx_SH3_SCIF_REGTYPE,
@@ -162,7 +160,6 @@ static struct platform_device scif1_device = {
static struct plat_sci_port scif2_platform_data = { static struct plat_sci_port scif2_platform_data = {
.port_reg = SCIx_NOT_SUPPORTED, .port_reg = SCIx_NOT_SUPPORTED,
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_TE | SCSCR_RE,
.type = PORT_IRDA, .type = PORT_IRDA,
.ops = &sh770x_sci_port_ops, .ops = &sh770x_sci_port_ops,
.regshift = 1, .regshift = 1,

View File

@@ -99,8 +99,7 @@ static struct platform_device rtc_device = {
static struct plat_sci_port scif0_platform_data = { static struct plat_sci_port scif0_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_TE | SCSCR_RE | SCSCR_REIE | .scscr = SCSCR_REIE | SCSCR_CKE1 | SCSCR_CKE0,
SCSCR_CKE1 | SCSCR_CKE0,
.type = PORT_SCIF, .type = PORT_SCIF,
}; };
@@ -121,8 +120,7 @@ static struct platform_device scif0_device = {
static struct plat_sci_port scif1_platform_data = { static struct plat_sci_port scif1_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_TE | SCSCR_RE | SCSCR_REIE | .scscr = SCSCR_REIE | SCSCR_CKE1 | SCSCR_CKE0,
SCSCR_CKE1 | SCSCR_CKE0,
.type = PORT_SCIF, .type = PORT_SCIF,
}; };

View File

@@ -53,7 +53,6 @@ static struct platform_device rtc_device = {
static struct plat_sci_port scif0_platform_data = { static struct plat_sci_port scif0_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RE | SCSCR_TE,
.type = PORT_SCIF, .type = PORT_SCIF,
.ops = &sh7720_sci_port_ops, .ops = &sh7720_sci_port_ops,
.regtype = SCIx_SH7705_SCIF_REGTYPE, .regtype = SCIx_SH7705_SCIF_REGTYPE,
@@ -76,7 +75,6 @@ static struct platform_device scif0_device = {
static struct plat_sci_port scif1_platform_data = { static struct plat_sci_port scif1_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RE | SCSCR_TE,
.type = PORT_SCIF, .type = PORT_SCIF,
.ops = &sh7720_sci_port_ops, .ops = &sh7720_sci_port_ops,
.regtype = SCIx_SH7705_SCIF_REGTYPE, .regtype = SCIx_SH7705_SCIF_REGTYPE,

View File

@@ -18,7 +18,7 @@
static struct plat_sci_port scif0_platform_data = { static struct plat_sci_port scif0_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scscr = SCSCR_REIE,
.type = PORT_SCIF, .type = PORT_SCIF,
}; };

View File

@@ -40,7 +40,6 @@ static struct platform_device rtc_device = {
static struct plat_sci_port sci_platform_data = { static struct plat_sci_port sci_platform_data = {
.port_reg = 0xffe0001C, .port_reg = 0xffe0001C,
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_TE | SCSCR_RE,
.type = PORT_SCI, .type = PORT_SCI,
.regshift = 2, .regshift = 2,
}; };
@@ -62,7 +61,7 @@ static struct platform_device sci_device = {
static struct plat_sci_port scif_platform_data = { static struct plat_sci_port scif_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_TE | SCSCR_RE | SCSCR_REIE, .scscr = SCSCR_REIE,
.type = PORT_SCIF, .type = PORT_SCIF,
}; };

View File

@@ -129,7 +129,7 @@ static DECLARE_INTC_DESC(intc_desc_irq, "sh7760-irq", vectors_irq, groups,
static struct plat_sci_port scif0_platform_data = { static struct plat_sci_port scif0_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scscr = SCSCR_REIE,
.type = PORT_SCIF, .type = PORT_SCIF,
.regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE, .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
}; };
@@ -155,7 +155,7 @@ static struct platform_device scif0_device = {
static struct plat_sci_port scif1_platform_data = { static struct plat_sci_port scif1_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.type = PORT_SCIF, .type = PORT_SCIF,
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scscr = SCSCR_REIE,
.regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE, .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
}; };
@@ -179,7 +179,7 @@ static struct platform_device scif1_device = {
static struct plat_sci_port scif2_platform_data = { static struct plat_sci_port scif2_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scscr = SCSCR_REIE,
.type = PORT_SCIF, .type = PORT_SCIF,
.regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE, .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
}; };
@@ -204,7 +204,7 @@ static struct platform_device scif2_device = {
static struct plat_sci_port scif3_platform_data = { static struct plat_sci_port scif3_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scscr = SCSCR_REIE,
.type = PORT_SCI, .type = PORT_SCI,
.regshift = 2, .regshift = 2,
}; };

View File

@@ -19,7 +19,7 @@
/* Serial */ /* Serial */
static struct plat_sci_port scif0_platform_data = { static struct plat_sci_port scif0_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, .scscr = SCSCR_CKE1,
.type = PORT_SCIF, .type = PORT_SCIF,
}; };
@@ -40,7 +40,7 @@ static struct platform_device scif0_device = {
static struct plat_sci_port scif1_platform_data = { static struct plat_sci_port scif1_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, .scscr = SCSCR_CKE1,
.type = PORT_SCIF, .type = PORT_SCIF,
}; };
@@ -61,7 +61,7 @@ static struct platform_device scif1_device = {
static struct plat_sci_port scif2_platform_data = { static struct plat_sci_port scif2_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, .scscr = SCSCR_CKE1,
.type = PORT_SCIF, .type = PORT_SCIF,
}; };
@@ -82,7 +82,7 @@ static struct platform_device scif2_device = {
static struct plat_sci_port scif3_platform_data = { static struct plat_sci_port scif3_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, .scscr = SCSCR_CKE1,
.type = PORT_SCIF, .type = PORT_SCIF,
}; };

View File

@@ -22,7 +22,7 @@
static struct plat_sci_port scif0_platform_data = { static struct plat_sci_port scif0_platform_data = {
.port_reg = 0xa405013e, .port_reg = 0xa405013e,
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scscr = SCSCR_REIE,
.type = PORT_SCIF, .type = PORT_SCIF,
}; };

View File

@@ -180,7 +180,7 @@ struct platform_device dma_device = {
/* Serial */ /* Serial */
static struct plat_sci_port scif0_platform_data = { static struct plat_sci_port scif0_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scscr = SCSCR_REIE,
.type = PORT_SCIF, .type = PORT_SCIF,
.ops = &sh7722_sci_port_ops, .ops = &sh7722_sci_port_ops,
.regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE, .regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
@@ -203,7 +203,7 @@ static struct platform_device scif0_device = {
static struct plat_sci_port scif1_platform_data = { static struct plat_sci_port scif1_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scscr = SCSCR_REIE,
.type = PORT_SCIF, .type = PORT_SCIF,
.ops = &sh7722_sci_port_ops, .ops = &sh7722_sci_port_ops,
.regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE, .regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
@@ -226,7 +226,7 @@ static struct platform_device scif1_device = {
static struct plat_sci_port scif2_platform_data = { static struct plat_sci_port scif2_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scscr = SCSCR_REIE,
.type = PORT_SCIF, .type = PORT_SCIF,
.ops = &sh7722_sci_port_ops, .ops = &sh7722_sci_port_ops,
.regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE, .regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,

View File

@@ -25,7 +25,7 @@
static struct plat_sci_port scif0_platform_data = { static struct plat_sci_port scif0_platform_data = {
.port_reg = 0xa4050160, .port_reg = 0xa4050160,
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scscr = SCSCR_REIE,
.type = PORT_SCIF, .type = PORT_SCIF,
.regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE, .regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
}; };
@@ -48,7 +48,7 @@ static struct platform_device scif0_device = {
static struct plat_sci_port scif1_platform_data = { static struct plat_sci_port scif1_platform_data = {
.port_reg = SCIx_NOT_SUPPORTED, .port_reg = SCIx_NOT_SUPPORTED,
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scscr = SCSCR_REIE,
.type = PORT_SCIF, .type = PORT_SCIF,
.regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE, .regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
}; };
@@ -71,7 +71,7 @@ static struct platform_device scif1_device = {
static struct plat_sci_port scif2_platform_data = { static struct plat_sci_port scif2_platform_data = {
.port_reg = SCIx_NOT_SUPPORTED, .port_reg = SCIx_NOT_SUPPORTED,
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scscr = SCSCR_REIE,
.type = PORT_SCIF, .type = PORT_SCIF,
.regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE, .regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
}; };
@@ -94,7 +94,7 @@ static struct platform_device scif2_device = {
static struct plat_sci_port scif3_platform_data = { static struct plat_sci_port scif3_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.port_reg = SCIx_NOT_SUPPORTED, .port_reg = SCIx_NOT_SUPPORTED,
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scscr = SCSCR_REIE,
.sampling_rate = 8, .sampling_rate = 8,
.type = PORT_SCIFA, .type = PORT_SCIFA,
}; };
@@ -117,7 +117,7 @@ static struct platform_device scif3_device = {
static struct plat_sci_port scif4_platform_data = { static struct plat_sci_port scif4_platform_data = {
.port_reg = SCIx_NOT_SUPPORTED, .port_reg = SCIx_NOT_SUPPORTED,
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scscr = SCSCR_REIE,
.sampling_rate = 8, .sampling_rate = 8,
.type = PORT_SCIFA, .type = PORT_SCIFA,
}; };
@@ -140,7 +140,7 @@ static struct platform_device scif4_device = {
static struct plat_sci_port scif5_platform_data = { static struct plat_sci_port scif5_platform_data = {
.port_reg = SCIx_NOT_SUPPORTED, .port_reg = SCIx_NOT_SUPPORTED,
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scscr = SCSCR_REIE,
.sampling_rate = 8, .sampling_rate = 8,
.type = PORT_SCIFA, .type = PORT_SCIFA,
}; };

View File

@@ -292,7 +292,7 @@ static struct platform_device dma1_device = {
static struct plat_sci_port scif0_platform_data = { static struct plat_sci_port scif0_platform_data = {
.port_reg = SCIx_NOT_SUPPORTED, .port_reg = SCIx_NOT_SUPPORTED,
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scscr = SCSCR_REIE,
.type = PORT_SCIF, .type = PORT_SCIF,
.regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE, .regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
}; };
@@ -315,7 +315,7 @@ static struct platform_device scif0_device = {
static struct plat_sci_port scif1_platform_data = { static struct plat_sci_port scif1_platform_data = {
.port_reg = SCIx_NOT_SUPPORTED, .port_reg = SCIx_NOT_SUPPORTED,
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scscr = SCSCR_REIE,
.type = PORT_SCIF, .type = PORT_SCIF,
.regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE, .regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
}; };
@@ -338,7 +338,7 @@ static struct platform_device scif1_device = {
static struct plat_sci_port scif2_platform_data = { static struct plat_sci_port scif2_platform_data = {
.port_reg = SCIx_NOT_SUPPORTED, .port_reg = SCIx_NOT_SUPPORTED,
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scscr = SCSCR_REIE,
.type = PORT_SCIF, .type = PORT_SCIF,
.regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE, .regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
}; };
@@ -361,7 +361,6 @@ static struct platform_device scif2_device = {
static struct plat_sci_port scif3_platform_data = { static struct plat_sci_port scif3_platform_data = {
.port_reg = SCIx_NOT_SUPPORTED, .port_reg = SCIx_NOT_SUPPORTED,
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RE | SCSCR_TE,
.sampling_rate = 8, .sampling_rate = 8,
.type = PORT_SCIFA, .type = PORT_SCIFA,
}; };
@@ -384,7 +383,6 @@ static struct platform_device scif3_device = {
static struct plat_sci_port scif4_platform_data = { static struct plat_sci_port scif4_platform_data = {
.port_reg = SCIx_NOT_SUPPORTED, .port_reg = SCIx_NOT_SUPPORTED,
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RE | SCSCR_TE,
.sampling_rate = 8, .sampling_rate = 8,
.type = PORT_SCIFA, .type = PORT_SCIFA,
}; };
@@ -407,7 +405,6 @@ static struct platform_device scif4_device = {
static struct plat_sci_port scif5_platform_data = { static struct plat_sci_port scif5_platform_data = {
.port_reg = SCIx_NOT_SUPPORTED, .port_reg = SCIx_NOT_SUPPORTED,
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RE | SCSCR_TE,
.sampling_rate = 8, .sampling_rate = 8,
.type = PORT_SCIFA, .type = PORT_SCIFA,
}; };

View File

@@ -26,7 +26,7 @@
/* SCIF */ /* SCIF */
static struct plat_sci_port scif0_platform_data = { static struct plat_sci_port scif0_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scscr = SCSCR_REIE,
.type = PORT_SCIF, .type = PORT_SCIF,
.regtype = SCIx_SH4_SCIF_BRG_REGTYPE, .regtype = SCIx_SH4_SCIF_BRG_REGTYPE,
}; };
@@ -48,7 +48,7 @@ static struct platform_device scif0_device = {
static struct plat_sci_port scif1_platform_data = { static struct plat_sci_port scif1_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scscr = SCSCR_REIE,
.type = PORT_SCIF, .type = PORT_SCIF,
.regtype = SCIx_SH4_SCIF_BRG_REGTYPE, .regtype = SCIx_SH4_SCIF_BRG_REGTYPE,
}; };
@@ -70,7 +70,7 @@ static struct platform_device scif1_device = {
static struct plat_sci_port scif2_platform_data = { static struct plat_sci_port scif2_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scscr = SCSCR_REIE,
.type = PORT_SCIF, .type = PORT_SCIF,
.regtype = SCIx_SH4_SCIF_BRG_REGTYPE, .regtype = SCIx_SH4_SCIF_BRG_REGTYPE,
}; };
@@ -92,7 +92,7 @@ static struct platform_device scif2_device = {
static struct plat_sci_port scif3_platform_data = { static struct plat_sci_port scif3_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE, .scscr = SCSCR_REIE | SCSCR_TOIE,
.type = PORT_SCIF, .type = PORT_SCIF,
.regtype = SCIx_SH4_SCIF_BRG_REGTYPE, .regtype = SCIx_SH4_SCIF_BRG_REGTYPE,
}; };
@@ -114,7 +114,7 @@ static struct platform_device scif3_device = {
static struct plat_sci_port scif4_platform_data = { static struct plat_sci_port scif4_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scscr = SCSCR_REIE,
.type = PORT_SCIF, .type = PORT_SCIF,
.regtype = SCIx_SH4_SCIF_BRG_REGTYPE, .regtype = SCIx_SH4_SCIF_BRG_REGTYPE,
}; };
@@ -136,7 +136,7 @@ static struct platform_device scif4_device = {
static struct plat_sci_port scif5_platform_data = { static struct plat_sci_port scif5_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scscr = SCSCR_REIE,
.type = PORT_SCIF, .type = PORT_SCIF,
.regtype = SCIx_SH4_SCIF_BRG_REGTYPE, .regtype = SCIx_SH4_SCIF_BRG_REGTYPE,
}; };

View File

@@ -25,7 +25,7 @@
static struct plat_sci_port scif2_platform_data = { static struct plat_sci_port scif2_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scscr = SCSCR_REIE,
.type = PORT_SCIF, .type = PORT_SCIF,
}; };
@@ -46,7 +46,7 @@ static struct platform_device scif2_device = {
static struct plat_sci_port scif3_platform_data = { static struct plat_sci_port scif3_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scscr = SCSCR_REIE,
.type = PORT_SCIF, .type = PORT_SCIF,
}; };
@@ -67,7 +67,7 @@ static struct platform_device scif3_device = {
static struct plat_sci_port scif4_platform_data = { static struct plat_sci_port scif4_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scscr = SCSCR_REIE,
.type = PORT_SCIF, .type = PORT_SCIF,
}; };

View File

@@ -20,7 +20,7 @@
static struct plat_sci_port scif0_platform_data = { static struct plat_sci_port scif0_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scscr = SCSCR_REIE,
.type = PORT_SCIF, .type = PORT_SCIF,
.regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE, .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
}; };
@@ -42,7 +42,7 @@ static struct platform_device scif0_device = {
static struct plat_sci_port scif1_platform_data = { static struct plat_sci_port scif1_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scscr = SCSCR_REIE,
.type = PORT_SCIF, .type = PORT_SCIF,
.regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE, .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
}; };
@@ -64,7 +64,7 @@ static struct platform_device scif1_device = {
static struct plat_sci_port scif2_platform_data = { static struct plat_sci_port scif2_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scscr = SCSCR_REIE,
.type = PORT_SCIF, .type = PORT_SCIF,
.regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE, .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
}; };

View File

@@ -17,7 +17,7 @@
static struct plat_sci_port scif0_platform_data = { static struct plat_sci_port scif0_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE, .scscr = SCSCR_REIE | SCSCR_TOIE,
.type = PORT_SCIF, .type = PORT_SCIF,
}; };
@@ -38,7 +38,7 @@ static struct platform_device scif0_device = {
static struct plat_sci_port scif1_platform_data = { static struct plat_sci_port scif1_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE, .scscr = SCSCR_REIE | SCSCR_TOIE,
.type = PORT_SCIF, .type = PORT_SCIF,
}; };
@@ -59,7 +59,7 @@ static struct platform_device scif1_device = {
static struct plat_sci_port scif2_platform_data = { static struct plat_sci_port scif2_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE, .scscr = SCSCR_REIE | SCSCR_TOIE,
.type = PORT_SCIF, .type = PORT_SCIF,
}; };
@@ -80,7 +80,7 @@ static struct platform_device scif2_device = {
static struct plat_sci_port scif3_platform_data = { static struct plat_sci_port scif3_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE, .scscr = SCSCR_REIE | SCSCR_TOIE,
.type = PORT_SCIF, .type = PORT_SCIF,
}; };
@@ -101,7 +101,7 @@ static struct platform_device scif3_device = {
static struct plat_sci_port scif4_platform_data = { static struct plat_sci_port scif4_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE, .scscr = SCSCR_REIE | SCSCR_TOIE,
.type = PORT_SCIF, .type = PORT_SCIF,
}; };
@@ -122,7 +122,7 @@ static struct platform_device scif4_device = {
static struct plat_sci_port scif5_platform_data = { static struct plat_sci_port scif5_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE, .scscr = SCSCR_REIE | SCSCR_TOIE,
.type = PORT_SCIF, .type = PORT_SCIF,
}; };
@@ -143,7 +143,7 @@ static struct platform_device scif5_device = {
static struct plat_sci_port scif6_platform_data = { static struct plat_sci_port scif6_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE, .scscr = SCSCR_REIE | SCSCR_TOIE,
.type = PORT_SCIF, .type = PORT_SCIF,
}; };
@@ -164,7 +164,7 @@ static struct platform_device scif6_device = {
static struct plat_sci_port scif7_platform_data = { static struct plat_sci_port scif7_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE, .scscr = SCSCR_REIE | SCSCR_TOIE,
.type = PORT_SCIF, .type = PORT_SCIF,
}; };
@@ -185,7 +185,7 @@ static struct platform_device scif7_device = {
static struct plat_sci_port scif8_platform_data = { static struct plat_sci_port scif8_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE, .scscr = SCSCR_REIE | SCSCR_TOIE,
.type = PORT_SCIF, .type = PORT_SCIF,
}; };
@@ -206,7 +206,7 @@ static struct platform_device scif8_device = {
static struct plat_sci_port scif9_platform_data = { static struct plat_sci_port scif9_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE, .scscr = SCSCR_REIE | SCSCR_TOIE,
.type = PORT_SCIF, .type = PORT_SCIF,
}; };

View File

@@ -19,7 +19,7 @@
static struct plat_sci_port scif0_platform_data = { static struct plat_sci_port scif0_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1, .scscr = SCSCR_REIE | SCSCR_CKE1,
.type = PORT_SCIF, .type = PORT_SCIF,
.regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE, .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
}; };
@@ -41,7 +41,7 @@ static struct platform_device scif0_device = {
static struct plat_sci_port scif1_platform_data = { static struct plat_sci_port scif1_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1, .scscr = SCSCR_REIE | SCSCR_CKE1,
.type = PORT_SCIF, .type = PORT_SCIF,
.regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE, .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
}; };

View File

@@ -21,7 +21,7 @@
static struct plat_sci_port scif0_platform_data = { static struct plat_sci_port scif0_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1, .scscr = SCSCR_REIE | SCSCR_CKE1,
.type = PORT_SCIF, .type = PORT_SCIF,
.regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE, .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
}; };
@@ -43,7 +43,7 @@ static struct platform_device scif0_device = {
static struct plat_sci_port scif1_platform_data = { static struct plat_sci_port scif1_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1, .scscr = SCSCR_REIE | SCSCR_CKE1,
.type = PORT_SCIF, .type = PORT_SCIF,
.regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE, .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
}; };
@@ -65,7 +65,7 @@ static struct platform_device scif1_device = {
static struct plat_sci_port scif2_platform_data = { static struct plat_sci_port scif2_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1, .scscr = SCSCR_REIE | SCSCR_CKE1,
.type = PORT_SCIF, .type = PORT_SCIF,
.regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE, .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
}; };
@@ -87,7 +87,7 @@ static struct platform_device scif2_device = {
static struct plat_sci_port scif3_platform_data = { static struct plat_sci_port scif3_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1, .scscr = SCSCR_REIE | SCSCR_CKE1,
.type = PORT_SCIF, .type = PORT_SCIF,
.regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE, .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
}; };
@@ -109,7 +109,7 @@ static struct platform_device scif3_device = {
static struct plat_sci_port scif4_platform_data = { static struct plat_sci_port scif4_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1, .scscr = SCSCR_REIE | SCSCR_CKE1,
.type = PORT_SCIF, .type = PORT_SCIF,
.regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE, .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
}; };
@@ -131,7 +131,7 @@ static struct platform_device scif4_device = {
static struct plat_sci_port scif5_platform_data = { static struct plat_sci_port scif5_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1, .scscr = SCSCR_REIE | SCSCR_CKE1,
.type = PORT_SCIF, .type = PORT_SCIF,
.regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE, .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
}; };

View File

@@ -29,7 +29,7 @@
static struct plat_sci_port scif0_platform_data = { static struct plat_sci_port scif0_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1, .scscr = SCSCR_REIE | SCSCR_CKE1,
.type = PORT_SCIF, .type = PORT_SCIF,
.regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE, .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
}; };
@@ -57,7 +57,7 @@ static struct platform_device scif0_device = {
*/ */
static struct plat_sci_port scif1_platform_data = { static struct plat_sci_port scif1_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1, .scscr = SCSCR_REIE | SCSCR_CKE1,
.type = PORT_SCIF, .type = PORT_SCIF,
.regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE, .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
}; };
@@ -88,7 +88,7 @@ static struct platform_device scif1_device = {
static struct plat_sci_port scif2_platform_data = { static struct plat_sci_port scif2_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1, .scscr = SCSCR_REIE | SCSCR_CKE1,
.type = PORT_SCIF, .type = PORT_SCIF,
.regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE, .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
}; };
@@ -110,7 +110,7 @@ static struct platform_device scif2_device = {
static struct plat_sci_port scif3_platform_data = { static struct plat_sci_port scif3_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1, .scscr = SCSCR_REIE | SCSCR_CKE1,
.type = PORT_SCIF, .type = PORT_SCIF,
.regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE, .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
}; };
@@ -132,7 +132,7 @@ static struct platform_device scif3_device = {
static struct plat_sci_port scif4_platform_data = { static struct plat_sci_port scif4_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1, .scscr = SCSCR_REIE | SCSCR_CKE1,
.type = PORT_SCIF, .type = PORT_SCIF,
.regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE, .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
}; };
@@ -154,7 +154,7 @@ static struct platform_device scif4_device = {
static struct plat_sci_port scif5_platform_data = { static struct plat_sci_port scif5_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1, .scscr = SCSCR_REIE | SCSCR_CKE1,
.type = PORT_SCIF, .type = PORT_SCIF,
.regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE, .regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
}; };

View File

@@ -29,7 +29,7 @@
*/ */
static struct plat_sci_port scif0_platform_data = { static struct plat_sci_port scif0_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scscr = SCSCR_REIE,
.type = PORT_SCIF, .type = PORT_SCIF,
}; };
@@ -53,7 +53,7 @@ static struct platform_device scif0_device = {
static struct plat_sci_port scif1_platform_data = { static struct plat_sci_port scif1_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scscr = SCSCR_REIE,
.type = PORT_SCIF, .type = PORT_SCIF,
}; };
@@ -77,7 +77,7 @@ static struct platform_device scif1_device = {
static struct plat_sci_port scif2_platform_data = { static struct plat_sci_port scif2_platform_data = {
.flags = UPF_BOOT_AUTOCONF, .flags = UPF_BOOT_AUTOCONF,
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scscr = SCSCR_REIE,
.type = PORT_SCIF, .type = PORT_SCIF,
}; };

View File

@@ -18,7 +18,7 @@
static struct plat_sci_port scif0_platform_data = { static struct plat_sci_port scif0_platform_data = {
.flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE, .scscr = SCSCR_REIE,
.type = PORT_SCIF, .type = PORT_SCIF,
}; };