sh: Don't set sh-sci pdata scscr TE and RE bits
The bits are set by the driver internally, don't set them in platform data. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:

committed by
Greg Kroah-Hartman

parent
3d73f32bfa
commit
c3fa400b27
@@ -19,7 +19,7 @@
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/* Serial */
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static struct plat_sci_port scif0_platform_data = {
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.flags = UPF_BOOT_AUTOCONF,
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.scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
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.scscr = SCSCR_CKE1,
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.type = PORT_SCIF,
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};
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@@ -40,7 +40,7 @@ static struct platform_device scif0_device = {
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static struct plat_sci_port scif1_platform_data = {
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.flags = UPF_BOOT_AUTOCONF,
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.scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
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.scscr = SCSCR_CKE1,
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.type = PORT_SCIF,
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};
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@@ -61,7 +61,7 @@ static struct platform_device scif1_device = {
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static struct plat_sci_port scif2_platform_data = {
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.flags = UPF_BOOT_AUTOCONF,
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.scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
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.scscr = SCSCR_CKE1,
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.type = PORT_SCIF,
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};
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@@ -82,7 +82,7 @@ static struct platform_device scif2_device = {
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static struct plat_sci_port scif3_platform_data = {
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.flags = UPF_BOOT_AUTOCONF,
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.scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
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.scscr = SCSCR_CKE1,
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.type = PORT_SCIF,
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};
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@@ -22,7 +22,7 @@
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static struct plat_sci_port scif0_platform_data = {
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.port_reg = 0xa405013e,
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.flags = UPF_BOOT_AUTOCONF,
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.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
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.scscr = SCSCR_REIE,
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.type = PORT_SCIF,
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};
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@@ -180,7 +180,7 @@ struct platform_device dma_device = {
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/* Serial */
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static struct plat_sci_port scif0_platform_data = {
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.flags = UPF_BOOT_AUTOCONF,
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.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
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.scscr = SCSCR_REIE,
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.type = PORT_SCIF,
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.ops = &sh7722_sci_port_ops,
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.regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
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@@ -203,7 +203,7 @@ static struct platform_device scif0_device = {
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static struct plat_sci_port scif1_platform_data = {
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.flags = UPF_BOOT_AUTOCONF,
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.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
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.scscr = SCSCR_REIE,
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.type = PORT_SCIF,
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.ops = &sh7722_sci_port_ops,
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.regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
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@@ -226,7 +226,7 @@ static struct platform_device scif1_device = {
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static struct plat_sci_port scif2_platform_data = {
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.flags = UPF_BOOT_AUTOCONF,
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.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
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.scscr = SCSCR_REIE,
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.type = PORT_SCIF,
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.ops = &sh7722_sci_port_ops,
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.regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
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@@ -25,7 +25,7 @@
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static struct plat_sci_port scif0_platform_data = {
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.port_reg = 0xa4050160,
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.flags = UPF_BOOT_AUTOCONF,
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.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
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.scscr = SCSCR_REIE,
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.type = PORT_SCIF,
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.regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
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};
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@@ -48,7 +48,7 @@ static struct platform_device scif0_device = {
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static struct plat_sci_port scif1_platform_data = {
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.port_reg = SCIx_NOT_SUPPORTED,
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.flags = UPF_BOOT_AUTOCONF,
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.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
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.scscr = SCSCR_REIE,
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.type = PORT_SCIF,
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.regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
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};
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@@ -71,7 +71,7 @@ static struct platform_device scif1_device = {
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static struct plat_sci_port scif2_platform_data = {
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.port_reg = SCIx_NOT_SUPPORTED,
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.flags = UPF_BOOT_AUTOCONF,
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.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
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.scscr = SCSCR_REIE,
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.type = PORT_SCIF,
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.regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
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};
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@@ -94,7 +94,7 @@ static struct platform_device scif2_device = {
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static struct plat_sci_port scif3_platform_data = {
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.flags = UPF_BOOT_AUTOCONF,
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.port_reg = SCIx_NOT_SUPPORTED,
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.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
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.scscr = SCSCR_REIE,
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.sampling_rate = 8,
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.type = PORT_SCIFA,
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};
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@@ -117,7 +117,7 @@ static struct platform_device scif3_device = {
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static struct plat_sci_port scif4_platform_data = {
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.port_reg = SCIx_NOT_SUPPORTED,
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.flags = UPF_BOOT_AUTOCONF,
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.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
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.scscr = SCSCR_REIE,
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.sampling_rate = 8,
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.type = PORT_SCIFA,
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};
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@@ -140,7 +140,7 @@ static struct platform_device scif4_device = {
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static struct plat_sci_port scif5_platform_data = {
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.port_reg = SCIx_NOT_SUPPORTED,
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.flags = UPF_BOOT_AUTOCONF,
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.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
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.scscr = SCSCR_REIE,
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.sampling_rate = 8,
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.type = PORT_SCIFA,
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};
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@@ -292,7 +292,7 @@ static struct platform_device dma1_device = {
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static struct plat_sci_port scif0_platform_data = {
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.port_reg = SCIx_NOT_SUPPORTED,
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.flags = UPF_BOOT_AUTOCONF,
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.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
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.scscr = SCSCR_REIE,
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.type = PORT_SCIF,
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.regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
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};
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@@ -315,7 +315,7 @@ static struct platform_device scif0_device = {
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static struct plat_sci_port scif1_platform_data = {
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.port_reg = SCIx_NOT_SUPPORTED,
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.flags = UPF_BOOT_AUTOCONF,
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.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
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.scscr = SCSCR_REIE,
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.type = PORT_SCIF,
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.regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
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};
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@@ -338,7 +338,7 @@ static struct platform_device scif1_device = {
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static struct plat_sci_port scif2_platform_data = {
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.port_reg = SCIx_NOT_SUPPORTED,
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.flags = UPF_BOOT_AUTOCONF,
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.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
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.scscr = SCSCR_REIE,
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.type = PORT_SCIF,
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.regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
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};
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@@ -361,7 +361,6 @@ static struct platform_device scif2_device = {
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static struct plat_sci_port scif3_platform_data = {
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.port_reg = SCIx_NOT_SUPPORTED,
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.flags = UPF_BOOT_AUTOCONF,
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.scscr = SCSCR_RE | SCSCR_TE,
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.sampling_rate = 8,
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.type = PORT_SCIFA,
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};
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@@ -384,7 +383,6 @@ static struct platform_device scif3_device = {
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static struct plat_sci_port scif4_platform_data = {
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.port_reg = SCIx_NOT_SUPPORTED,
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.flags = UPF_BOOT_AUTOCONF,
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.scscr = SCSCR_RE | SCSCR_TE,
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.sampling_rate = 8,
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.type = PORT_SCIFA,
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};
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@@ -407,7 +405,6 @@ static struct platform_device scif4_device = {
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static struct plat_sci_port scif5_platform_data = {
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.port_reg = SCIx_NOT_SUPPORTED,
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.flags = UPF_BOOT_AUTOCONF,
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.scscr = SCSCR_RE | SCSCR_TE,
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.sampling_rate = 8,
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.type = PORT_SCIFA,
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};
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@@ -26,7 +26,7 @@
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/* SCIF */
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static struct plat_sci_port scif0_platform_data = {
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.flags = UPF_BOOT_AUTOCONF,
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.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
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.scscr = SCSCR_REIE,
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.type = PORT_SCIF,
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.regtype = SCIx_SH4_SCIF_BRG_REGTYPE,
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};
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@@ -48,7 +48,7 @@ static struct platform_device scif0_device = {
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static struct plat_sci_port scif1_platform_data = {
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.flags = UPF_BOOT_AUTOCONF,
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.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
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.scscr = SCSCR_REIE,
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.type = PORT_SCIF,
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.regtype = SCIx_SH4_SCIF_BRG_REGTYPE,
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};
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@@ -70,7 +70,7 @@ static struct platform_device scif1_device = {
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static struct plat_sci_port scif2_platform_data = {
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.flags = UPF_BOOT_AUTOCONF,
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.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
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.scscr = SCSCR_REIE,
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.type = PORT_SCIF,
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.regtype = SCIx_SH4_SCIF_BRG_REGTYPE,
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};
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@@ -92,7 +92,7 @@ static struct platform_device scif2_device = {
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static struct plat_sci_port scif3_platform_data = {
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.flags = UPF_BOOT_AUTOCONF,
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.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
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.scscr = SCSCR_REIE | SCSCR_TOIE,
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.type = PORT_SCIF,
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.regtype = SCIx_SH4_SCIF_BRG_REGTYPE,
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};
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@@ -114,7 +114,7 @@ static struct platform_device scif3_device = {
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static struct plat_sci_port scif4_platform_data = {
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.flags = UPF_BOOT_AUTOCONF,
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.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
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.scscr = SCSCR_REIE,
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.type = PORT_SCIF,
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.regtype = SCIx_SH4_SCIF_BRG_REGTYPE,
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};
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@@ -136,7 +136,7 @@ static struct platform_device scif4_device = {
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static struct plat_sci_port scif5_platform_data = {
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.flags = UPF_BOOT_AUTOCONF,
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.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
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.scscr = SCSCR_REIE,
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.type = PORT_SCIF,
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.regtype = SCIx_SH4_SCIF_BRG_REGTYPE,
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};
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@@ -25,7 +25,7 @@
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static struct plat_sci_port scif2_platform_data = {
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.flags = UPF_BOOT_AUTOCONF,
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.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
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.scscr = SCSCR_REIE,
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.type = PORT_SCIF,
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};
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@@ -46,7 +46,7 @@ static struct platform_device scif2_device = {
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static struct plat_sci_port scif3_platform_data = {
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.flags = UPF_BOOT_AUTOCONF,
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.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
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.scscr = SCSCR_REIE,
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.type = PORT_SCIF,
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};
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@@ -67,7 +67,7 @@ static struct platform_device scif3_device = {
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static struct plat_sci_port scif4_platform_data = {
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.flags = UPF_BOOT_AUTOCONF,
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.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
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.scscr = SCSCR_REIE,
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.type = PORT_SCIF,
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};
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@@ -20,7 +20,7 @@
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static struct plat_sci_port scif0_platform_data = {
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.flags = UPF_BOOT_AUTOCONF,
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.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
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.scscr = SCSCR_REIE,
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.type = PORT_SCIF,
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.regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
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};
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@@ -42,7 +42,7 @@ static struct platform_device scif0_device = {
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static struct plat_sci_port scif1_platform_data = {
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.flags = UPF_BOOT_AUTOCONF,
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.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
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.scscr = SCSCR_REIE,
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.type = PORT_SCIF,
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.regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
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};
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@@ -64,7 +64,7 @@ static struct platform_device scif1_device = {
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static struct plat_sci_port scif2_platform_data = {
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.flags = UPF_BOOT_AUTOCONF,
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.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
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.scscr = SCSCR_REIE,
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.type = PORT_SCIF,
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.regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
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};
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@@ -17,7 +17,7 @@
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static struct plat_sci_port scif0_platform_data = {
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.flags = UPF_BOOT_AUTOCONF,
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.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
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.scscr = SCSCR_REIE | SCSCR_TOIE,
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.type = PORT_SCIF,
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};
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@@ -38,7 +38,7 @@ static struct platform_device scif0_device = {
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static struct plat_sci_port scif1_platform_data = {
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.flags = UPF_BOOT_AUTOCONF,
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.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
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.scscr = SCSCR_REIE | SCSCR_TOIE,
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.type = PORT_SCIF,
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};
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@@ -59,7 +59,7 @@ static struct platform_device scif1_device = {
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static struct plat_sci_port scif2_platform_data = {
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.flags = UPF_BOOT_AUTOCONF,
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.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
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.scscr = SCSCR_REIE | SCSCR_TOIE,
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.type = PORT_SCIF,
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};
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@@ -80,7 +80,7 @@ static struct platform_device scif2_device = {
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static struct plat_sci_port scif3_platform_data = {
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.flags = UPF_BOOT_AUTOCONF,
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.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
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.scscr = SCSCR_REIE | SCSCR_TOIE,
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.type = PORT_SCIF,
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};
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@@ -101,7 +101,7 @@ static struct platform_device scif3_device = {
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static struct plat_sci_port scif4_platform_data = {
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.flags = UPF_BOOT_AUTOCONF,
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.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
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.scscr = SCSCR_REIE | SCSCR_TOIE,
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.type = PORT_SCIF,
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};
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@@ -122,7 +122,7 @@ static struct platform_device scif4_device = {
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static struct plat_sci_port scif5_platform_data = {
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.flags = UPF_BOOT_AUTOCONF,
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.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
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.scscr = SCSCR_REIE | SCSCR_TOIE,
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.type = PORT_SCIF,
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};
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@@ -143,7 +143,7 @@ static struct platform_device scif5_device = {
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static struct plat_sci_port scif6_platform_data = {
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.flags = UPF_BOOT_AUTOCONF,
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.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
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.scscr = SCSCR_REIE | SCSCR_TOIE,
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.type = PORT_SCIF,
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};
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@@ -164,7 +164,7 @@ static struct platform_device scif6_device = {
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static struct plat_sci_port scif7_platform_data = {
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.flags = UPF_BOOT_AUTOCONF,
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.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
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.scscr = SCSCR_REIE | SCSCR_TOIE,
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.type = PORT_SCIF,
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};
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@@ -185,7 +185,7 @@ static struct platform_device scif7_device = {
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static struct plat_sci_port scif8_platform_data = {
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.flags = UPF_BOOT_AUTOCONF,
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.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
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.scscr = SCSCR_REIE | SCSCR_TOIE,
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.type = PORT_SCIF,
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};
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@@ -206,7 +206,7 @@ static struct platform_device scif8_device = {
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static struct plat_sci_port scif9_platform_data = {
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.flags = UPF_BOOT_AUTOCONF,
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.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
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.scscr = SCSCR_REIE | SCSCR_TOIE,
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.type = PORT_SCIF,
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};
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@@ -19,7 +19,7 @@
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static struct plat_sci_port scif0_platform_data = {
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.flags = UPF_BOOT_AUTOCONF,
|
||||
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
|
||||
.scscr = SCSCR_REIE | SCSCR_CKE1,
|
||||
.type = PORT_SCIF,
|
||||
.regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
|
||||
};
|
||||
@@ -41,7 +41,7 @@ static struct platform_device scif0_device = {
|
||||
|
||||
static struct plat_sci_port scif1_platform_data = {
|
||||
.flags = UPF_BOOT_AUTOCONF,
|
||||
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
|
||||
.scscr = SCSCR_REIE | SCSCR_CKE1,
|
||||
.type = PORT_SCIF,
|
||||
.regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
|
||||
};
|
||||
|
@@ -21,7 +21,7 @@
|
||||
|
||||
static struct plat_sci_port scif0_platform_data = {
|
||||
.flags = UPF_BOOT_AUTOCONF,
|
||||
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
|
||||
.scscr = SCSCR_REIE | SCSCR_CKE1,
|
||||
.type = PORT_SCIF,
|
||||
.regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
|
||||
};
|
||||
@@ -43,7 +43,7 @@ static struct platform_device scif0_device = {
|
||||
|
||||
static struct plat_sci_port scif1_platform_data = {
|
||||
.flags = UPF_BOOT_AUTOCONF,
|
||||
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
|
||||
.scscr = SCSCR_REIE | SCSCR_CKE1,
|
||||
.type = PORT_SCIF,
|
||||
.regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
|
||||
};
|
||||
@@ -65,7 +65,7 @@ static struct platform_device scif1_device = {
|
||||
|
||||
static struct plat_sci_port scif2_platform_data = {
|
||||
.flags = UPF_BOOT_AUTOCONF,
|
||||
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
|
||||
.scscr = SCSCR_REIE | SCSCR_CKE1,
|
||||
.type = PORT_SCIF,
|
||||
.regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
|
||||
};
|
||||
@@ -87,7 +87,7 @@ static struct platform_device scif2_device = {
|
||||
|
||||
static struct plat_sci_port scif3_platform_data = {
|
||||
.flags = UPF_BOOT_AUTOCONF,
|
||||
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
|
||||
.scscr = SCSCR_REIE | SCSCR_CKE1,
|
||||
.type = PORT_SCIF,
|
||||
.regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
|
||||
};
|
||||
@@ -109,7 +109,7 @@ static struct platform_device scif3_device = {
|
||||
|
||||
static struct plat_sci_port scif4_platform_data = {
|
||||
.flags = UPF_BOOT_AUTOCONF,
|
||||
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
|
||||
.scscr = SCSCR_REIE | SCSCR_CKE1,
|
||||
.type = PORT_SCIF,
|
||||
.regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
|
||||
};
|
||||
@@ -131,7 +131,7 @@ static struct platform_device scif4_device = {
|
||||
|
||||
static struct plat_sci_port scif5_platform_data = {
|
||||
.flags = UPF_BOOT_AUTOCONF,
|
||||
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
|
||||
.scscr = SCSCR_REIE | SCSCR_CKE1,
|
||||
.type = PORT_SCIF,
|
||||
.regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
|
||||
};
|
||||
|
@@ -29,7 +29,7 @@
|
||||
|
||||
static struct plat_sci_port scif0_platform_data = {
|
||||
.flags = UPF_BOOT_AUTOCONF,
|
||||
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
|
||||
.scscr = SCSCR_REIE | SCSCR_CKE1,
|
||||
.type = PORT_SCIF,
|
||||
.regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
|
||||
};
|
||||
@@ -57,7 +57,7 @@ static struct platform_device scif0_device = {
|
||||
*/
|
||||
static struct plat_sci_port scif1_platform_data = {
|
||||
.flags = UPF_BOOT_AUTOCONF,
|
||||
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
|
||||
.scscr = SCSCR_REIE | SCSCR_CKE1,
|
||||
.type = PORT_SCIF,
|
||||
.regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
|
||||
};
|
||||
@@ -88,7 +88,7 @@ static struct platform_device scif1_device = {
|
||||
|
||||
static struct plat_sci_port scif2_platform_data = {
|
||||
.flags = UPF_BOOT_AUTOCONF,
|
||||
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
|
||||
.scscr = SCSCR_REIE | SCSCR_CKE1,
|
||||
.type = PORT_SCIF,
|
||||
.regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
|
||||
};
|
||||
@@ -110,7 +110,7 @@ static struct platform_device scif2_device = {
|
||||
|
||||
static struct plat_sci_port scif3_platform_data = {
|
||||
.flags = UPF_BOOT_AUTOCONF,
|
||||
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
|
||||
.scscr = SCSCR_REIE | SCSCR_CKE1,
|
||||
.type = PORT_SCIF,
|
||||
.regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
|
||||
};
|
||||
@@ -132,7 +132,7 @@ static struct platform_device scif3_device = {
|
||||
|
||||
static struct plat_sci_port scif4_platform_data = {
|
||||
.flags = UPF_BOOT_AUTOCONF,
|
||||
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
|
||||
.scscr = SCSCR_REIE | SCSCR_CKE1,
|
||||
.type = PORT_SCIF,
|
||||
.regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
|
||||
};
|
||||
@@ -154,7 +154,7 @@ static struct platform_device scif4_device = {
|
||||
|
||||
static struct plat_sci_port scif5_platform_data = {
|
||||
.flags = UPF_BOOT_AUTOCONF,
|
||||
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
|
||||
.scscr = SCSCR_REIE | SCSCR_CKE1,
|
||||
.type = PORT_SCIF,
|
||||
.regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
|
||||
};
|
||||
|
@@ -29,7 +29,7 @@
|
||||
*/
|
||||
static struct plat_sci_port scif0_platform_data = {
|
||||
.flags = UPF_BOOT_AUTOCONF,
|
||||
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
|
||||
.scscr = SCSCR_REIE,
|
||||
.type = PORT_SCIF,
|
||||
};
|
||||
|
||||
@@ -53,7 +53,7 @@ static struct platform_device scif0_device = {
|
||||
|
||||
static struct plat_sci_port scif1_platform_data = {
|
||||
.flags = UPF_BOOT_AUTOCONF,
|
||||
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
|
||||
.scscr = SCSCR_REIE,
|
||||
.type = PORT_SCIF,
|
||||
};
|
||||
|
||||
@@ -77,7 +77,7 @@ static struct platform_device scif1_device = {
|
||||
|
||||
static struct plat_sci_port scif2_platform_data = {
|
||||
.flags = UPF_BOOT_AUTOCONF,
|
||||
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
|
||||
.scscr = SCSCR_REIE,
|
||||
.type = PORT_SCIF,
|
||||
};
|
||||
|
||||
|
Reference in New Issue
Block a user