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coresight: tmc: Add configuration support for trace buffer size

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Now that we can dynamically switch between contiguous memory and
SG table depending on the trace buffer size, provide the support
for selecting an appropriate buffer size.

Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Suzuki K Poulose
2018-07-11 13:40:24 -06:00
committed by Greg Kroah-Hartman
parent e8e3b77139
commit c34cc23f1d
3 changed files with 43 additions and 1 deletions
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33
drivers/hwtracing/coresight/coresight-tmc.c
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@@ -277,8 +277,41 @@ static ssize_t trigger_cntr_store(struct device *dev,
}
static DEVICE_ATTR_RW(trigger_cntr);
static ssize_t buffer_size_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct tmc_drvdata *drvdata = dev_get_drvdata(dev->parent);
return sprintf(buf, "%#x\n", drvdata->size);
}
static ssize_t buffer_size_store(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t size)
{
int ret;
unsigned long val;
struct tmc_drvdata *drvdata = dev_get_drvdata(dev->parent);
/* Only permitted for TMC-ETRs */
if (drvdata->config_type != TMC_CONFIG_TYPE_ETR)
return -EPERM;
ret = kstrtoul(buf, 0, &val);
if (ret)
return ret;
/* The buffer size should be page aligned */
if (val & (PAGE_SIZE - 1))
return -EINVAL;
drvdata->size = val;
return size;
}
static DEVICE_ATTR_RW(buffer_size);
static struct attribute *coresight_tmc_attrs[] = {
&dev_attr_trigger_cntr.attr,
&dev_attr_buffer_size.attr,
NULL,
};