drm/i915: Don't call gen8_fbc_sw_flush() on chv
CHV doesn't have FBC, so don't go calling gen8_fbc_sw_flush() on it. Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> [danvet: Add a FIXME comment while at it that we should rework this a lot more.] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Daniel Vetter

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3d45eb8949
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c317adcd58
@@ -9098,7 +9098,12 @@ void intel_frontbuffer_flush(struct drm_device *dev,
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intel_edp_psr_flush(dev, frontbuffer_bits);
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intel_edp_psr_flush(dev, frontbuffer_bits);
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if (IS_GEN8(dev))
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/*
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* FIXME: Unconditional fbc flushing here is a rather gross hack and
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* needs to be reworked into a proper frontbuffer tracking scheme like
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* psr employs.
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*/
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if (IS_BROADWELL(dev))
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gen8_fbc_sw_flush(dev, FBC_REND_CACHE_CLEAN);
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gen8_fbc_sw_flush(dev, FBC_REND_CACHE_CLEAN);
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}
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}
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