drm/i915: Use GPLL ref clock to calculate GPU freqs on VLV/CHV
Extract the GPLL reference frequency from CCK and use it in the GPU freq<->opcode conversions on VLV/CHV. This eliminates all the assumptions we have about which divider is used for which czclk frequency. Note that unlike most clocks from CCK, the GPLL ref clock is a divided down version of the CZ clock rather than the HPLL clock. CZ clock itself is a divided down version of the HPLL clock though, so in effect it just gets divided down twice. While at it, throw in a few comments explaining the remaining constants for anyone who later wants to compare this to the spreadsheets. v2: Add slow/fast notes for CHV clocks (Imre) Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1457120584-26080-2-git-send-email-ville.syrjala@linux.intel.com Reviewed-by: Imre Deak <imre.deak@intel.com> (v1)
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@@ -147,15 +147,12 @@ static int valleyview_get_vco(struct drm_i915_private *dev_priv)
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return vco_freq[hpll_freq] * 1000;
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}
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static int vlv_get_cck_clock_hpll(struct drm_i915_private *dev_priv,
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const char *name, u32 reg)
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int vlv_get_cck_clock(struct drm_i915_private *dev_priv,
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const char *name, u32 reg, int ref_freq)
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{
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u32 val;
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int divider;
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if (dev_priv->hpll_freq == 0)
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dev_priv->hpll_freq = valleyview_get_vco(dev_priv);
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mutex_lock(&dev_priv->sb_lock);
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val = vlv_cck_read(dev_priv, reg);
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mutex_unlock(&dev_priv->sb_lock);
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@@ -166,7 +163,17 @@ static int vlv_get_cck_clock_hpll(struct drm_i915_private *dev_priv,
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(divider << CCK_FREQUENCY_STATUS_SHIFT),
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"%s change in progress\n", name);
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return DIV_ROUND_CLOSEST(dev_priv->hpll_freq << 1, divider + 1);
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return DIV_ROUND_CLOSEST(ref_freq << 1, divider + 1);
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}
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static int vlv_get_cck_clock_hpll(struct drm_i915_private *dev_priv,
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const char *name, u32 reg)
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{
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if (dev_priv->hpll_freq == 0)
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dev_priv->hpll_freq = valleyview_get_vco(dev_priv);
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return vlv_get_cck_clock(dev_priv, name, reg,
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dev_priv->hpll_freq);
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}
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static int
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