e1000e: use generic IEEE MII definitions
For standard IEEE MII-compatible transceivers, the kernel has generic register and bit definitions. Use those instead of redundant local defines. Do not replace references of MII_CR_SPEED_10 with BMCR_SPEED10 (0x0000) when it is not necessary (i.e. when it is bitwise OR'ed with another value). Some whitespace issues in the surrounding context of the above changes are also cleaned up. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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Jeff Kirsher

parent
8bb628697f
commit
c2ade1a41d
@@ -1053,14 +1053,14 @@ s32 e1000e_config_fc_after_link_up(struct e1000_hw *hw)
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* has completed. We read this twice because this reg has
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* some "sticky" (latched) bits.
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*/
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ret_val = e1e_rphy(hw, PHY_STATUS, &mii_status_reg);
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ret_val = e1e_rphy(hw, MII_BMSR, &mii_status_reg);
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if (ret_val)
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return ret_val;
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ret_val = e1e_rphy(hw, PHY_STATUS, &mii_status_reg);
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ret_val = e1e_rphy(hw, MII_BMSR, &mii_status_reg);
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if (ret_val)
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return ret_val;
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if (!(mii_status_reg & MII_SR_AUTONEG_COMPLETE)) {
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if (!(mii_status_reg & BMSR_ANEGCOMPLETE)) {
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e_dbg("Copper PHY and Auto Neg has not completed.\n");
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return ret_val;
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}
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@@ -1071,11 +1071,10 @@ s32 e1000e_config_fc_after_link_up(struct e1000_hw *hw)
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* Page Ability Register (Address 5) to determine how
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* flow control was negotiated.
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*/
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ret_val = e1e_rphy(hw, PHY_AUTONEG_ADV, &mii_nway_adv_reg);
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ret_val = e1e_rphy(hw, MII_ADVERTISE, &mii_nway_adv_reg);
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if (ret_val)
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return ret_val;
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ret_val = e1e_rphy(hw, PHY_LP_ABILITY,
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&mii_nway_lp_ability_reg);
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ret_val = e1e_rphy(hw, MII_LPA, &mii_nway_lp_ability_reg);
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if (ret_val)
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return ret_val;
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@@ -1112,8 +1111,8 @@ s32 e1000e_config_fc_after_link_up(struct e1000_hw *hw)
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* 1 | DC | 1 | DC | E1000_fc_full
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*
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*/
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if ((mii_nway_adv_reg & NWAY_AR_PAUSE) &&
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(mii_nway_lp_ability_reg & NWAY_LPAR_PAUSE)) {
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if ((mii_nway_adv_reg & ADVERTISE_PAUSE_CAP) &&
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(mii_nway_lp_ability_reg & LPA_PAUSE_CAP)) {
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/* Now we need to check if the user selected Rx ONLY
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* of pause frames. In this case, we had to advertise
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* FULL flow control because we could not advertise Rx
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@@ -1135,10 +1134,10 @@ s32 e1000e_config_fc_after_link_up(struct e1000_hw *hw)
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*-------|---------|-------|---------|--------------------
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* 0 | 1 | 1 | 1 | e1000_fc_tx_pause
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*/
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else if (!(mii_nway_adv_reg & NWAY_AR_PAUSE) &&
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(mii_nway_adv_reg & NWAY_AR_ASM_DIR) &&
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(mii_nway_lp_ability_reg & NWAY_LPAR_PAUSE) &&
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(mii_nway_lp_ability_reg & NWAY_LPAR_ASM_DIR)) {
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else if (!(mii_nway_adv_reg & ADVERTISE_PAUSE_CAP) &&
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(mii_nway_adv_reg & ADVERTISE_PAUSE_ASYM) &&
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(mii_nway_lp_ability_reg & LPA_PAUSE_CAP) &&
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(mii_nway_lp_ability_reg & LPA_PAUSE_ASYM)) {
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hw->fc.current_mode = e1000_fc_tx_pause;
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e_dbg("Flow Control = Tx PAUSE frames only.\n");
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}
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@@ -1149,10 +1148,10 @@ s32 e1000e_config_fc_after_link_up(struct e1000_hw *hw)
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*-------|---------|-------|---------|--------------------
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* 1 | 1 | 0 | 1 | e1000_fc_rx_pause
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*/
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else if ((mii_nway_adv_reg & NWAY_AR_PAUSE) &&
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(mii_nway_adv_reg & NWAY_AR_ASM_DIR) &&
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!(mii_nway_lp_ability_reg & NWAY_LPAR_PAUSE) &&
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(mii_nway_lp_ability_reg & NWAY_LPAR_ASM_DIR)) {
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else if ((mii_nway_adv_reg & ADVERTISE_PAUSE_CAP) &&
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(mii_nway_adv_reg & ADVERTISE_PAUSE_ASYM) &&
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!(mii_nway_lp_ability_reg & LPA_PAUSE_CAP) &&
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(mii_nway_lp_ability_reg & LPA_PAUSE_ASYM)) {
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hw->fc.current_mode = e1000_fc_rx_pause;
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e_dbg("Flow Control = Rx PAUSE frames only.\n");
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} else {
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