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e1000e: Set HW FIFO minimum pointer gap for non-gig speeds

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Based on feedback from HW team, the configured value of the internal PHY
HW FIFO pointer gap was incorrect for non-gig speeds.
This patch provides the correct configuration.

Signed-off-by: Raanan Avargil <raanan.avargil@intel.com>
Tested-by: Aaron Brown <aaron.f.brown@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
This commit is contained in:
Raanan Avargil
2015-12-22 15:35:03 +02:00
committed by Jeff Kirsher
parent 74f31299a4
commit c26f40daf4
1 changed files with 12 additions and 0 deletions
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12
drivers/net/ethernet/intel/e1000e/ich8lan.c
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@@ -1479,6 +1479,18 @@ static s32 e1000_check_for_copper_link_ich8lan(struct e1000_hw *hw)
hw->phy.ops.release(hw); hw->phy.ops.release(hw);
if (ret_val) if (ret_val)
return ret_val; return ret_val;
} else {
ret_val = hw->phy.ops.acquire(hw);
if (ret_val)
return ret_val;
ret_val = e1e_wphy_locked(hw,
PHY_REG(776, 20),
0xC023);
hw->phy.ops.release(hw);
if (ret_val)
return ret_val;
} }
} }
} }