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Merge branch 'gic' of git://git.kernel.org/pub/scm/linux/kernel/git/cmarinas/linux-aarch64 into next/cleanup

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* 'gic' of git://git.kernel.org/pub/scm/linux/kernel/git/cmarinas/linux-aarch64:
  irqchip: gic: Perform the gic_secondary_init() call via CPU notifier
  irqchip: gic: Call handle_bad_irq() directly
  arm: Move chained_irq_(enter|exit) to a generic file
  arm: Move the set_handle_irq and handle_arch_irq declarations to asm/irq.h
  + Linux 3.9-rc3

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson
2013-04-02 10:59:15 -07:00
부모 46f101df78 c0114709ed
커밋 c2573077df
393개의 변경된 파일과 2696개의 추가작업 그리고 1849개의 파일을 삭제
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34
drivers/irqchip/irq-gic.c
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@@ -28,6 +28,7 @@
#include <linux/module.h>
#include <linux/list.h>
#include <linux/smp.h>
#include <linux/cpu.h>
#include <linux/cpu_pm.h>
#include <linux/cpumask.h>
#include <linux/io.h>
@@ -38,12 +39,12 @@
#include <linux/interrupt.h>
#include <linux/percpu.h>
#include <linux/slab.h>
#include <linux/irqchip/chained_irq.h>
#include <linux/irqchip/arm-gic.h>
#include <asm/irq.h>
#include <asm/exception.h>
#include <asm/smp_plat.h>
#include <asm/mach/irq.h>
#include "irqchip.h"
@@ -323,7 +324,7 @@ static void gic_handle_cascade_irq(unsigned int irq, struct irq_desc *desc)
cascade_irq = irq_find_mapping(chip_data->domain, gic_irq);
if (unlikely(gic_irq < 32 || gic_irq > 1020))
do_bad_IRQ(cascade_irq, desc);
handle_bad_irq(cascade_irq, desc);
else
generic_handle_irq(cascade_irq);
@@ -648,7 +649,7 @@ void gic_raise_softirq(const struct cpumask *mask, unsigned int irq)
/* Convert our logical CPU mask into a physical one. */
for_each_cpu(cpu, mask)
map |= 1 << cpu_logical_map(cpu);
map |= gic_cpu_map[cpu];
/*
* Ensure that stores to Normal memory are visible to the
@@ -699,6 +700,25 @@ static int gic_irq_domain_xlate(struct irq_domain *d,
return 0;
}
#ifdef CONFIG_SMP
static int __cpuinit gic_secondary_init(struct notifier_block *nfb,
unsigned long action, void *hcpu)
{
if (action == CPU_STARTING)
gic_cpu_init(&gic_data[0]);
return NOTIFY_OK;
}
/*
* Notifier for enabling the GIC CPU interface. Set an arbitrarily high
* priority because the GIC needs to be up before the ARM generic timers.
*/
static struct notifier_block __cpuinitdata gic_cpu_notifier = {
.notifier_call = gic_secondary_init,
.priority = 100,
};
#endif
const struct irq_domain_ops gic_irq_domain_ops = {
.map = gic_irq_domain_map,
.xlate = gic_irq_domain_xlate,
@@ -789,6 +809,7 @@ void __init gic_init_bases(unsigned int gic_nr, int irq_start,
#ifdef CONFIG_SMP
set_smp_cross_call(gic_raise_softirq);
register_cpu_notifier(&gic_cpu_notifier);
#endif
set_handle_irq(gic_handle_irq);
@@ -799,13 +820,6 @@ void __init gic_init_bases(unsigned int gic_nr, int irq_start,
gic_pm_init(gic);
}
void __cpuinit gic_secondary_init(unsigned int gic_nr)
{
BUG_ON(gic_nr >= MAX_GIC_NR);
gic_cpu_init(&gic_data[gic_nr]);
}
#ifdef CONFIG_OF
static int gic_cnt __initdata;