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ARM: PCI: provide a default bus scan implementation

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Most PCI implementations perform simple root bus scanning.  Rather than
having each group of platforms provide a duplicated bus scan function,
provide the PCI configuration ops structure via the hw_pci structure,
and call the root bus scanning function from core ARM PCI code.

Acked-by: Krzysztof Hałasa <khc@pm.waw.pl>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Russell King
2012-03-10 12:49:16 +00:00
parent daeb4c0c3b
commit c23bfc3835
52 changed files with 61 additions and 135 deletions
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8
arch/arm/mach-sa1100/pci-nanoengine.c
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@@ -129,12 +129,6 @@ static int __init pci_nanoengine_map_irq(const struct pci_dev *dev, u8 slot,
return NANOENGINE_IRQ_GPIO_PCI;
}
struct pci_bus * __init pci_nanoengine_scan_bus(int nr, struct pci_sys_data *sys)
{
return pci_scan_root_bus(NULL, sys->busnr, &pci_nano_ops, sys,
&sys->resources);
}
static struct resource pci_io_ports =
DEFINE_RES_IO_NAMED(0x400, 0x400, "PCI IO");
@@ -274,7 +268,7 @@ int __init pci_nanoengine_setup(int nr, struct pci_sys_data *sys)
static struct hw_pci nanoengine_pci __initdata = {
.map_irq = pci_nanoengine_map_irq,
.nr_controllers = 1,
.scan = pci_nanoengine_scan_bus,
.ops = &pci_nano_ops,
.setup = pci_nanoengine_setup,
};