amd64_edac: Erratum #637 workaround

F15h CPUs may report a non-DRAM address when reporting an error address
belonging to a CC6 state save area. Add a workaround to detect this
condition and compute the actual DRAM address of the error as documented
in the Revision Guide for AMD Family 15h Models 00h-0Fh Processors.

Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
This commit is contained in:
Borislav Petkov
2011-03-30 15:42:10 +02:00
parent f08e457cec
commit c1ae68309b
2 changed files with 51 additions and 2 deletions

View File

@@ -196,6 +196,7 @@
#define DCT_CFG_SEL 0x10C
#define DRAM_LOCAL_NODE_BASE 0x120
#define DRAM_LOCAL_NODE_LIM 0x124
#define DRAM_BASE_HI 0x140