Merge commit 'v2.6.28-rc8' into x86/uv
This commit is contained in:
@@ -41,7 +41,7 @@ obj-$(CONFIG_X86_TRAMPOLINE) += trampoline.o
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obj-y += process.o
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obj-y += i387.o xsave.o
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obj-y += ptrace.o
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obj-y += ds.o
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obj-$(CONFIG_X86_DS) += ds.o
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obj-$(CONFIG_X86_32) += tls.o
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obj-$(CONFIG_IA32_EMULATION) += tls.o
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obj-y += step.o
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|
@@ -187,6 +187,8 @@ static int iommu_queue_command(struct amd_iommu *iommu, struct iommu_cmd *cmd)
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spin_lock_irqsave(&iommu->lock, flags);
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ret = __iommu_queue_command(iommu, cmd);
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if (!ret)
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iommu->need_sync = 1;
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spin_unlock_irqrestore(&iommu->lock, flags);
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return ret;
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@@ -210,10 +212,13 @@ static int iommu_completion_wait(struct amd_iommu *iommu)
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cmd.data[0] = CMD_COMPL_WAIT_INT_MASK;
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CMD_SET_TYPE(&cmd, CMD_COMPL_WAIT);
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iommu->need_sync = 0;
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spin_lock_irqsave(&iommu->lock, flags);
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if (!iommu->need_sync)
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goto out;
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iommu->need_sync = 0;
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ret = __iommu_queue_command(iommu, &cmd);
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if (ret)
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@@ -254,8 +259,6 @@ static int iommu_queue_inv_dev_entry(struct amd_iommu *iommu, u16 devid)
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ret = iommu_queue_command(iommu, &cmd);
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iommu->need_sync = 1;
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return ret;
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}
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@@ -281,8 +284,6 @@ static int iommu_queue_inv_iommu_pages(struct amd_iommu *iommu,
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ret = iommu_queue_command(iommu, &cmd);
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iommu->need_sync = 1;
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return ret;
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}
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@@ -343,7 +344,7 @@ static int iommu_map(struct protection_domain *dom,
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u64 __pte, *pte, *page;
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bus_addr = PAGE_ALIGN(bus_addr);
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phys_addr = PAGE_ALIGN(bus_addr);
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phys_addr = PAGE_ALIGN(phys_addr);
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/* only support 512GB address spaces for now */
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if (bus_addr > IOMMU_MAP_SIZE_L3 || !(prot & IOMMU_PROT_MASK))
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@@ -599,7 +600,7 @@ static void dma_ops_free_pagetable(struct dma_ops_domain *dma_dom)
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continue;
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p2 = IOMMU_PTE_PAGE(p1[i]);
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for (j = 0; j < 512; ++i) {
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for (j = 0; j < 512; ++j) {
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if (!IOMMU_PTE_PRESENT(p2[j]))
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continue;
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p3 = IOMMU_PTE_PAGE(p2[j]);
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@@ -762,8 +763,6 @@ static void set_device_domain(struct amd_iommu *iommu,
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write_unlock_irqrestore(&amd_iommu_devtable_lock, flags);
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iommu_queue_inv_dev_entry(iommu, devid);
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iommu->need_sync = 1;
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}
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/*****************************************************************************
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@@ -858,6 +857,9 @@ static int get_device_resources(struct device *dev,
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print_devid(_bdf, 1);
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}
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if (domain_for_device(_bdf) == NULL)
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set_device_domain(*iommu, *domain, _bdf);
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return 1;
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}
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@@ -908,7 +910,7 @@ static void dma_ops_domain_unmap(struct amd_iommu *iommu,
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if (address >= dom->aperture_size)
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return;
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WARN_ON(address & 0xfffULL || address > dom->aperture_size);
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WARN_ON(address & ~PAGE_MASK || address >= dom->aperture_size);
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pte = dom->pte_pages[IOMMU_PTE_L1_INDEX(address)];
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pte += IOMMU_PTE_L0_INDEX(address);
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@@ -920,8 +922,8 @@ static void dma_ops_domain_unmap(struct amd_iommu *iommu,
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/*
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* This function contains common code for mapping of a physically
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* contiguous memory region into DMA address space. It is uses by all
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* mapping functions provided by this IOMMU driver.
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* contiguous memory region into DMA address space. It is used by all
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* mapping functions provided with this IOMMU driver.
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* Must be called with the domain lock held.
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*/
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static dma_addr_t __map_single(struct device *dev,
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@@ -981,7 +983,8 @@ static void __unmap_single(struct amd_iommu *iommu,
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dma_addr_t i, start;
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unsigned int pages;
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if ((dma_addr == 0) || (dma_addr + size > dma_dom->aperture_size))
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if ((dma_addr == bad_dma_address) ||
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(dma_addr + size > dma_dom->aperture_size))
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return;
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pages = iommu_num_pages(dma_addr, size, PAGE_SIZE);
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@@ -1031,8 +1034,7 @@ static dma_addr_t map_single(struct device *dev, phys_addr_t paddr,
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if (addr == bad_dma_address)
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goto out;
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if (unlikely(iommu->need_sync))
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iommu_completion_wait(iommu);
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iommu_completion_wait(iommu);
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out:
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spin_unlock_irqrestore(&domain->lock, flags);
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@@ -1060,8 +1062,7 @@ static void unmap_single(struct device *dev, dma_addr_t dma_addr,
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__unmap_single(iommu, domain->priv, dma_addr, size, dir);
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if (unlikely(iommu->need_sync))
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iommu_completion_wait(iommu);
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iommu_completion_wait(iommu);
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spin_unlock_irqrestore(&domain->lock, flags);
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}
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@@ -1127,8 +1128,7 @@ static int map_sg(struct device *dev, struct scatterlist *sglist,
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goto unmap;
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}
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if (unlikely(iommu->need_sync))
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iommu_completion_wait(iommu);
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iommu_completion_wait(iommu);
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out:
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spin_unlock_irqrestore(&domain->lock, flags);
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@@ -1173,8 +1173,7 @@ static void unmap_sg(struct device *dev, struct scatterlist *sglist,
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s->dma_address = s->dma_length = 0;
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}
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if (unlikely(iommu->need_sync))
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iommu_completion_wait(iommu);
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iommu_completion_wait(iommu);
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spin_unlock_irqrestore(&domain->lock, flags);
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}
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@@ -1225,8 +1224,7 @@ static void *alloc_coherent(struct device *dev, size_t size,
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goto out;
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}
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if (unlikely(iommu->need_sync))
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iommu_completion_wait(iommu);
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iommu_completion_wait(iommu);
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out:
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spin_unlock_irqrestore(&domain->lock, flags);
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@@ -1257,8 +1255,7 @@ static void free_coherent(struct device *dev, size_t size,
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__unmap_single(iommu, domain->priv, dma_addr, size, DMA_BIDIRECTIONAL);
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if (unlikely(iommu->need_sync))
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iommu_completion_wait(iommu);
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iommu_completion_wait(iommu);
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spin_unlock_irqrestore(&domain->lock, flags);
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@@ -1315,7 +1315,7 @@ void enable_x2apic(void)
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}
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}
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void enable_IR_x2apic(void)
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void __init enable_IR_x2apic(void)
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{
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#ifdef CONFIG_INTR_REMAP
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int ret;
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@@ -115,9 +115,20 @@ static int query_current_values_with_pending_wait(struct powernow_k8_data *data)
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u32 i = 0;
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if (cpu_family == CPU_HW_PSTATE) {
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rdmsr(MSR_PSTATE_STATUS, lo, hi);
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i = lo & HW_PSTATE_MASK;
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data->currpstate = i;
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if (data->currpstate == HW_PSTATE_INVALID) {
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/* read (initial) hw pstate if not yet set */
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rdmsr(MSR_PSTATE_STATUS, lo, hi);
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i = lo & HW_PSTATE_MASK;
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/*
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* a workaround for family 11h erratum 311 might cause
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* an "out-of-range Pstate if the core is in Pstate-0
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*/
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if (i >= data->numps)
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data->currpstate = HW_PSTATE_0;
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else
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data->currpstate = i;
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}
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return 0;
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}
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do {
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@@ -1121,6 +1132,7 @@ static int __cpuinit powernowk8_cpu_init(struct cpufreq_policy *pol)
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}
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data->cpu = pol->cpu;
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data->currpstate = HW_PSTATE_INVALID;
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if (powernow_k8_cpu_init_acpi(data)) {
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/*
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@@ -5,6 +5,19 @@
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* http://www.gnu.org/licenses/gpl.html
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*/
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enum pstate {
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HW_PSTATE_INVALID = 0xff,
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HW_PSTATE_0 = 0,
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HW_PSTATE_1 = 1,
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HW_PSTATE_2 = 2,
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HW_PSTATE_3 = 3,
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HW_PSTATE_4 = 4,
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HW_PSTATE_5 = 5,
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HW_PSTATE_6 = 6,
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HW_PSTATE_7 = 7,
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};
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struct powernow_k8_data {
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unsigned int cpu;
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@@ -23,7 +36,9 @@ struct powernow_k8_data {
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u32 exttype; /* extended interface = 1 */
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/* keep track of the current fid / vid or pstate */
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u32 currvid, currfid, currpstate;
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u32 currvid;
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u32 currfid;
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enum pstate currpstate;
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/* the powernow_table includes all frequency and vid/fid pairings:
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* fid are the lower 8 bits of the index, vid are the upper 8 bits.
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|
@@ -21,8 +21,6 @@
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*/
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||||
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#ifdef CONFIG_X86_DS
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#include <asm/ds.h>
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#include <linux/errno.h>
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@@ -211,14 +209,15 @@ static DEFINE_PER_CPU(struct ds_context *, system_context);
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static inline struct ds_context *ds_get_context(struct task_struct *task)
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{
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struct ds_context *context;
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unsigned long irq;
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|
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spin_lock(&ds_lock);
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spin_lock_irqsave(&ds_lock, irq);
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|
||||
context = (task ? task->thread.ds_ctx : this_system_context);
|
||||
if (context)
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context->count++;
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||||
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||||
spin_unlock(&ds_lock);
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spin_unlock_irqrestore(&ds_lock, irq);
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||||
|
||||
return context;
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||||
}
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@@ -226,55 +225,46 @@ static inline struct ds_context *ds_get_context(struct task_struct *task)
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/*
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* Same as ds_get_context, but allocates the context and it's DS
|
||||
* structure, if necessary; returns NULL; if out of memory.
|
||||
*
|
||||
* pre: requires ds_lock to be held
|
||||
*/
|
||||
static inline struct ds_context *ds_alloc_context(struct task_struct *task)
|
||||
{
|
||||
struct ds_context **p_context =
|
||||
(task ? &task->thread.ds_ctx : &this_system_context);
|
||||
struct ds_context *context = *p_context;
|
||||
unsigned long irq;
|
||||
|
||||
if (!context) {
|
||||
spin_unlock(&ds_lock);
|
||||
|
||||
context = kzalloc(sizeof(*context), GFP_KERNEL);
|
||||
|
||||
if (!context) {
|
||||
spin_lock(&ds_lock);
|
||||
if (!context)
|
||||
return NULL;
|
||||
}
|
||||
|
||||
context->ds = kzalloc(ds_cfg.sizeof_ds, GFP_KERNEL);
|
||||
if (!context->ds) {
|
||||
kfree(context);
|
||||
spin_lock(&ds_lock);
|
||||
return NULL;
|
||||
}
|
||||
|
||||
spin_lock(&ds_lock);
|
||||
/*
|
||||
* Check for race - another CPU could have allocated
|
||||
* it meanwhile:
|
||||
*/
|
||||
spin_lock_irqsave(&ds_lock, irq);
|
||||
|
||||
if (*p_context) {
|
||||
kfree(context->ds);
|
||||
kfree(context);
|
||||
return *p_context;
|
||||
|
||||
context = *p_context;
|
||||
} else {
|
||||
*p_context = context;
|
||||
|
||||
context->this = p_context;
|
||||
context->task = task;
|
||||
|
||||
if (task)
|
||||
set_tsk_thread_flag(task, TIF_DS_AREA_MSR);
|
||||
|
||||
if (!task || (task == current))
|
||||
wrmsrl(MSR_IA32_DS_AREA,
|
||||
(unsigned long)context->ds);
|
||||
}
|
||||
|
||||
*p_context = context;
|
||||
|
||||
context->this = p_context;
|
||||
context->task = task;
|
||||
|
||||
if (task)
|
||||
set_tsk_thread_flag(task, TIF_DS_AREA_MSR);
|
||||
|
||||
if (!task || (task == current))
|
||||
wrmsr(MSR_IA32_DS_AREA, (unsigned long)context->ds, 0);
|
||||
|
||||
get_tracer(task);
|
||||
spin_unlock_irqrestore(&ds_lock, irq);
|
||||
}
|
||||
|
||||
context->count++;
|
||||
@@ -288,10 +278,12 @@ static inline struct ds_context *ds_alloc_context(struct task_struct *task)
|
||||
*/
|
||||
static inline void ds_put_context(struct ds_context *context)
|
||||
{
|
||||
unsigned long irq;
|
||||
|
||||
if (!context)
|
||||
return;
|
||||
|
||||
spin_lock(&ds_lock);
|
||||
spin_lock_irqsave(&ds_lock, irq);
|
||||
|
||||
if (--context->count)
|
||||
goto out;
|
||||
@@ -313,7 +305,7 @@ static inline void ds_put_context(struct ds_context *context)
|
||||
kfree(context->ds);
|
||||
kfree(context);
|
||||
out:
|
||||
spin_unlock(&ds_lock);
|
||||
spin_unlock_irqrestore(&ds_lock, irq);
|
||||
}
|
||||
|
||||
|
||||
@@ -384,6 +376,7 @@ static int ds_request(struct task_struct *task, void *base, size_t size,
|
||||
struct ds_context *context;
|
||||
unsigned long buffer, adj;
|
||||
const unsigned long alignment = (1 << 3);
|
||||
unsigned long irq;
|
||||
int error = 0;
|
||||
|
||||
if (!ds_cfg.sizeof_ds)
|
||||
@@ -398,26 +391,27 @@ static int ds_request(struct task_struct *task, void *base, size_t size,
|
||||
return -EOPNOTSUPP;
|
||||
|
||||
|
||||
spin_lock(&ds_lock);
|
||||
|
||||
error = -ENOMEM;
|
||||
context = ds_alloc_context(task);
|
||||
if (!context)
|
||||
goto out_unlock;
|
||||
return -ENOMEM;
|
||||
|
||||
spin_lock_irqsave(&ds_lock, irq);
|
||||
|
||||
error = -EPERM;
|
||||
if (!check_tracer(task))
|
||||
goto out_unlock;
|
||||
|
||||
get_tracer(task);
|
||||
|
||||
error = -EALREADY;
|
||||
if (context->owner[qual] == current)
|
||||
goto out_unlock;
|
||||
goto out_put_tracer;
|
||||
error = -EPERM;
|
||||
if (context->owner[qual] != NULL)
|
||||
goto out_unlock;
|
||||
goto out_put_tracer;
|
||||
context->owner[qual] = current;
|
||||
|
||||
spin_unlock(&ds_lock);
|
||||
spin_unlock_irqrestore(&ds_lock, irq);
|
||||
|
||||
|
||||
error = -ENOMEM;
|
||||
@@ -465,10 +459,17 @@ static int ds_request(struct task_struct *task, void *base, size_t size,
|
||||
out_release:
|
||||
context->owner[qual] = NULL;
|
||||
ds_put_context(context);
|
||||
put_tracer(task);
|
||||
return error;
|
||||
|
||||
out_put_tracer:
|
||||
spin_unlock_irqrestore(&ds_lock, irq);
|
||||
ds_put_context(context);
|
||||
put_tracer(task);
|
||||
return error;
|
||||
|
||||
out_unlock:
|
||||
spin_unlock(&ds_lock);
|
||||
spin_unlock_irqrestore(&ds_lock, irq);
|
||||
ds_put_context(context);
|
||||
return error;
|
||||
}
|
||||
@@ -818,13 +819,21 @@ static const struct ds_configuration ds_cfg_var = {
|
||||
.sizeof_ds = sizeof(long) * 12,
|
||||
.sizeof_field = sizeof(long),
|
||||
.sizeof_rec[ds_bts] = sizeof(long) * 3,
|
||||
#ifdef __i386__
|
||||
.sizeof_rec[ds_pebs] = sizeof(long) * 10
|
||||
#else
|
||||
.sizeof_rec[ds_pebs] = sizeof(long) * 18
|
||||
#endif
|
||||
};
|
||||
static const struct ds_configuration ds_cfg_64 = {
|
||||
.sizeof_ds = 8 * 12,
|
||||
.sizeof_field = 8,
|
||||
.sizeof_rec[ds_bts] = 8 * 3,
|
||||
#ifdef __i386__
|
||||
.sizeof_rec[ds_pebs] = 8 * 10
|
||||
#else
|
||||
.sizeof_rec[ds_pebs] = 8 * 18
|
||||
#endif
|
||||
};
|
||||
|
||||
static inline void
|
||||
@@ -878,4 +887,3 @@ void ds_free(struct ds_context *context)
|
||||
while (leftovers--)
|
||||
ds_put_context(context);
|
||||
}
|
||||
#endif /* CONFIG_X86_DS */
|
||||
|
@@ -58,7 +58,7 @@ void __cpuinit mxcsr_feature_mask_init(void)
|
||||
stts();
|
||||
}
|
||||
|
||||
void __init init_thread_xstate(void)
|
||||
void __cpuinit init_thread_xstate(void)
|
||||
{
|
||||
if (!HAVE_HWFP) {
|
||||
xstate_size = sizeof(struct i387_soft_struct);
|
||||
|
@@ -1140,6 +1140,20 @@ static void __clear_irq_vector(int irq)
|
||||
|
||||
cfg->vector = 0;
|
||||
cpus_clear(cfg->domain);
|
||||
|
||||
if (likely(!cfg->move_in_progress))
|
||||
return;
|
||||
cpus_and(mask, cfg->old_domain, cpu_online_map);
|
||||
for_each_cpu_mask_nr(cpu, mask) {
|
||||
for (vector = FIRST_EXTERNAL_VECTOR; vector < NR_VECTORS;
|
||||
vector++) {
|
||||
if (per_cpu(vector_irq, cpu)[vector] != irq)
|
||||
continue;
|
||||
per_cpu(vector_irq, cpu)[vector] = -1;
|
||||
break;
|
||||
}
|
||||
}
|
||||
cfg->move_in_progress = 0;
|
||||
}
|
||||
|
||||
void __setup_vector_irq(int cpu)
|
||||
@@ -3594,27 +3608,7 @@ int __init io_apic_get_redir_entries (int ioapic)
|
||||
|
||||
int __init probe_nr_irqs(void)
|
||||
{
|
||||
int idx;
|
||||
int nr = 0;
|
||||
#ifndef CONFIG_XEN
|
||||
int nr_min = 32;
|
||||
#else
|
||||
int nr_min = NR_IRQS;
|
||||
#endif
|
||||
|
||||
for (idx = 0; idx < nr_ioapics; idx++)
|
||||
nr += io_apic_get_redir_entries(idx) + 1;
|
||||
|
||||
/* double it for hotplug and msi and nmi */
|
||||
nr <<= 1;
|
||||
|
||||
/* something wrong ? */
|
||||
if (nr < nr_min)
|
||||
nr = nr_min;
|
||||
if (WARN_ON(nr > NR_IRQS))
|
||||
nr = NR_IRQS;
|
||||
|
||||
return nr;
|
||||
return NR_IRQS;
|
||||
}
|
||||
|
||||
/* --------------------------------------------------------------------------
|
||||
@@ -3761,7 +3755,9 @@ int acpi_get_override_irq(int bus_irq, int *trigger, int *polarity)
|
||||
void __init setup_ioapic_dest(void)
|
||||
{
|
||||
int pin, ioapic, irq, irq_entry;
|
||||
struct irq_desc *desc;
|
||||
struct irq_cfg *cfg;
|
||||
cpumask_t mask;
|
||||
|
||||
if (skip_ioapic_setup == 1)
|
||||
return;
|
||||
@@ -3778,16 +3774,30 @@ void __init setup_ioapic_dest(void)
|
||||
* cpu is online.
|
||||
*/
|
||||
cfg = irq_cfg(irq);
|
||||
if (!cfg->vector)
|
||||
if (!cfg->vector) {
|
||||
setup_IO_APIC_irq(ioapic, pin, irq,
|
||||
irq_trigger(irq_entry),
|
||||
irq_polarity(irq_entry));
|
||||
#ifdef CONFIG_INTR_REMAP
|
||||
else if (intr_remapping_enabled)
|
||||
set_ir_ioapic_affinity_irq(irq, TARGET_CPUS);
|
||||
#endif
|
||||
continue;
|
||||
|
||||
}
|
||||
|
||||
/*
|
||||
* Honour affinities which have been set in early boot
|
||||
*/
|
||||
desc = irq_to_desc(irq);
|
||||
if (desc->status &
|
||||
(IRQ_NO_BALANCING | IRQ_AFFINITY_SET))
|
||||
mask = desc->affinity;
|
||||
else
|
||||
set_ioapic_affinity_irq(irq, TARGET_CPUS);
|
||||
mask = TARGET_CPUS;
|
||||
|
||||
#ifdef CONFIG_INTR_REMAP
|
||||
if (intr_remapping_enabled)
|
||||
set_ir_ioapic_affinity_irq(irq, mask);
|
||||
else
|
||||
#endif
|
||||
set_ioapic_affinity_irq(irq, mask);
|
||||
}
|
||||
|
||||
}
|
||||
|
@@ -128,7 +128,7 @@ static int kvm_register_clock(char *txt)
|
||||
}
|
||||
|
||||
#ifdef CONFIG_X86_LOCAL_APIC
|
||||
static void __devinit kvm_setup_secondary_clock(void)
|
||||
static void __cpuinit kvm_setup_secondary_clock(void)
|
||||
{
|
||||
/*
|
||||
* Now that the first cpu already had this clocksource initialized,
|
||||
|
@@ -604,6 +604,9 @@ static void __init __get_smp_config(unsigned int early)
|
||||
printk(KERN_INFO "Using ACPI for processor (LAPIC) "
|
||||
"configuration information\n");
|
||||
|
||||
if (!mpf)
|
||||
return;
|
||||
|
||||
printk(KERN_INFO "Intel MultiProcessor Specification v1.%d\n",
|
||||
mpf->mpf_specification);
|
||||
#if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32)
|
||||
|
@@ -7,7 +7,8 @@
|
||||
|
||||
#include <asm/paravirt.h>
|
||||
|
||||
static void default_spin_lock_flags(struct raw_spinlock *lock, unsigned long flags)
|
||||
static inline void
|
||||
default_spin_lock_flags(raw_spinlock_t *lock, unsigned long flags)
|
||||
{
|
||||
__raw_spin_lock(lock);
|
||||
}
|
||||
|
@@ -1567,7 +1567,7 @@ static int __init calgary_parse_options(char *p)
|
||||
++p;
|
||||
if (*p == '\0')
|
||||
break;
|
||||
bridge = simple_strtol(p, &endp, 0);
|
||||
bridge = simple_strtoul(p, &endp, 0);
|
||||
if (p == endp)
|
||||
break;
|
||||
|
||||
|
@@ -123,6 +123,8 @@ static void free_iommu(unsigned long offset, int size)
|
||||
|
||||
spin_lock_irqsave(&iommu_bitmap_lock, flags);
|
||||
iommu_area_free(iommu_gart_bitmap, offset, size);
|
||||
if (offset >= next_bit)
|
||||
next_bit = offset + size;
|
||||
spin_unlock_irqrestore(&iommu_bitmap_lock, flags);
|
||||
}
|
||||
|
||||
|
@@ -169,6 +169,15 @@ static struct dmi_system_id __initdata reboot_dmi_table[] = {
|
||||
DMI_MATCH(DMI_BOARD_NAME, "0KW626"),
|
||||
},
|
||||
},
|
||||
{ /* Handle problems with rebooting on Dell Optiplex 330 with 0KP561 */
|
||||
.callback = set_bios_reboot,
|
||||
.ident = "Dell OptiPlex 330",
|
||||
.matches = {
|
||||
DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
|
||||
DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 330"),
|
||||
DMI_MATCH(DMI_BOARD_NAME, "0KP561"),
|
||||
},
|
||||
},
|
||||
{ /* Handle problems with rebooting on Dell 2400's */
|
||||
.callback = set_bios_reboot,
|
||||
.ident = "Dell PowerEdge 2400",
|
||||
|
@@ -310,7 +310,7 @@ static void __init setup_xstate_init(void)
|
||||
/*
|
||||
* Enable and initialize the xsave feature.
|
||||
*/
|
||||
void __init xsave_cntxt_init(void)
|
||||
void __ref xsave_cntxt_init(void)
|
||||
{
|
||||
unsigned int eax, ebx, ecx, edx;
|
||||
|
||||
|
Reference in New Issue
Block a user