drm/i915: Extract GT render sleep (rc6) management
Continuing the theme of breaking intel_pm.c up in a reasonable chunk of powermanagement utilities, pull out the rc6 setup into its GT handler. Based on a patch by Chris Wilson. Signed-off-by: Andi Shyti <andi.shyti@intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20190919143840.20384-1-andi.shyti@intel.com Link: https://patchwork.freedesktop.org/patch/msgid/20190927110849.28734-1-chris@chris-wilson.co.uk
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@@ -32,7 +32,6 @@ void intel_pm_setup(struct drm_i915_private *dev_priv);
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void intel_gpu_ips_init(struct drm_i915_private *dev_priv);
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void intel_gpu_ips_teardown(void);
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void intel_init_gt_powersave(struct drm_i915_private *dev_priv);
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void intel_cleanup_gt_powersave(struct drm_i915_private *dev_priv);
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void intel_sanitize_gt_powersave(struct drm_i915_private *dev_priv);
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void intel_enable_gt_powersave(struct drm_i915_private *dev_priv);
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void intel_disable_gt_powersave(struct drm_i915_private *dev_priv);
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@@ -72,8 +71,6 @@ void intel_enable_ipc(struct drm_i915_private *dev_priv);
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int intel_gpu_freq(struct drm_i915_private *dev_priv, int val);
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int intel_freq_opcode(struct drm_i915_private *dev_priv, int val);
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u64 intel_rc6_residency_ns(struct drm_i915_private *dev_priv, i915_reg_t reg);
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u64 intel_rc6_residency_us(struct drm_i915_private *dev_priv, i915_reg_t reg);
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u32 intel_get_cagf(struct drm_i915_private *dev_priv, u32 rpstat1);
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