KVM: x86: Recompute PID.ON when clearing PID.SN
Some Posted-Interrupts from passthrough devices may be lost or overwritten when the vCPU is in runnable state. The SN (Suppress Notification) of PID (Posted Interrupt Descriptor) will be set when the vCPU is preempted (vCPU in KVM_MP_STATE_RUNNABLE state but not running on physical CPU). If a posted interrupt comes at this time, the irq remapping facility will set the bit of PIR (Posted Interrupt Requests) but not ON (Outstanding Notification). Then, the interrupt will not be seen by KVM, which always expects PID.ON=1 if PID.PIR=1 as documented in the Intel processor SDM but not in the VT-d specification. To fix this, restore the invariant after PID.SN is cleared. Signed-off-by: Luwei Kang <luwei.kang@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
此提交包含在:
@@ -1193,21 +1193,6 @@ static void vmx_vcpu_pi_load(struct kvm_vcpu *vcpu, int cpu)
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if (!pi_test_sn(pi_desc) && vcpu->cpu == cpu)
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return;
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/*
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* First handle the simple case where no cmpxchg is necessary; just
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* allow posting non-urgent interrupts.
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*
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* If the 'nv' field is POSTED_INTR_WAKEUP_VECTOR, do not change
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* PI.NDST: pi_post_block will do it for us and the wakeup_handler
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* expects the VCPU to be on the blocked_vcpu_list that matches
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* PI.NDST.
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*/
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if (pi_desc->nv == POSTED_INTR_WAKEUP_VECTOR ||
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vcpu->cpu == cpu) {
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pi_clear_sn(pi_desc);
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return;
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}
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/* The full case. */
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do {
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old.control = new.control = pi_desc->control;
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@@ -1222,6 +1207,17 @@ static void vmx_vcpu_pi_load(struct kvm_vcpu *vcpu, int cpu)
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new.sn = 0;
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} while (cmpxchg64(&pi_desc->control, old.control,
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new.control) != old.control);
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/*
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* Clear SN before reading the bitmap. The VT-d firmware
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* writes the bitmap and reads SN atomically (5.2.3 in the
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* spec), so it doesn't really have a memory barrier that
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* pairs with this, but we cannot do that and we need one.
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*/
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smp_mb__after_atomic();
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if (!bitmap_empty((unsigned long *)pi_desc->pir, NR_VECTORS))
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pi_set_on(pi_desc);
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}
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/*
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