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drm/i915: Extend the parser to check register writes against a mask/value pair.

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In some cases it might be unnecessary or dangerous to give userspace
the right to write arbitrary values to some register, even though it
might be desirable to give it control of some of its bits.  This patch
extends the register whitelist entries to contain a mask/value pair in
addition to the register offset.  For registers with non-zero mask,
any LRM writes and LRI writes where the bits of the immediate given by
the mask don't match the specified value will be rejected.

This will be used in my next patch to grant userspace partial write
access to some sensitive registers.

Signed-off-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
This commit is contained in:
Francisco Jerez
2015-05-29 16:44:14 +03:00
committed by Jani Nikula
parent 8a389cac1f
commit c1091b25f5
2 changed files with 96 additions and 47 deletions
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5
drivers/gpu/drm/i915/intel_ringbuffer.h
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@@ -118,6 +118,7 @@ struct intel_ringbuffer {
};
struct intel_context;
struct drm_i915_reg_descriptor;
struct intel_engine_cs {
const char *name;
@@ -300,14 +301,14 @@ struct intel_engine_cs {
/*
* Table of registers allowed in commands that read/write registers.
*/
const u32 *reg_table;
const struct drm_i915_reg_descriptor *reg_table;
int reg_count;
/*
* Table of registers allowed in commands that read/write registers, but
* only from the DRM master.
*/
const u32 *master_reg_table;
const struct drm_i915_reg_descriptor *master_reg_table;
int master_reg_count;
/*