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clk: samsung: exynos542x: add missing parent GSCL block clocks

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This patch adds clocks, which are required for preserving parent clock
configuration on GSCL power domain on/off.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
This commit is contained in:
Marek Szyprowski
2015-12-08 14:46:54 +01:00
committed by Sylwester Nawrocki
parent 9f9499ae8e
commit c0feb268da
2 changed files with 6 additions and 4 deletions
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2
include/dt-bindings/clock/exynos5420.h
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@@ -210,6 +210,8 @@
#define CLK_MOUT_SW_ACLK300 649
#define CLK_MOUT_USER_ACLK400_DISP1 650
#define CLK_MOUT_SW_ACLK400 651
#define CLK_MOUT_USER_ACLK300_GSCL 652
#define CLK_MOUT_SW_ACLK300_GSCL 653
/* divider clocks */
#define CLK_DOUT_PIXEL 768