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clk: renesas: cpg-mssr: Add R8A7743 support

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Add RZ/G1M (R8A7743) Clock Pulse Generator / Module Standby and Software
Reset support, using the CPG/MSSR driver core and the common R-Car Gen2
(and RZ/G) code.

Based on the proof-of-concept R8A7791 CPG/MSSR patch by Geert
Uytterhoeven <geert+renesas@glider.be>.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
Sergei Shtylyov
2016-11-09 00:21:50 +03:00
committed by Geert Uytterhoeven
parent 4683893574
commit c0b2d75d2a
6 changed files with 282 additions and 1 deletions
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4
Documentation/devicetree/bindings/clock/renesas,cpg-mssr.txt
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@@ -13,6 +13,7 @@ They provide the following functionalities:
Required Properties:
- compatible: Must be one of:
- "renesas,r8a7743-cpg-mssr" for the r8a7743 SoC (RZ/G1M)
- "renesas,r8a7795-cpg-mssr" for the r8a7795 SoC (R-Car H3)
- "renesas,r8a7796-cpg-mssr" for the r8a7796 SoC (R-Car M3-W)
@@ -22,8 +23,9 @@ Required Properties:
- clocks: References to external parent clocks, one entry for each entry in
clock-names
- clock-names: List of external parent clock names. Valid names are:
- "extal" (r8a7795, r8a7796)
- "extal" (r8a7743, r8a7795, r8a7796)
- "extalr" (r8a7795, r8a7796)
- "usb_extal" (r8a7743)
- #clock-cells: Must be 2
- For CPG core clocks, the two clock specifier cells must be "CPG_CORE"