ARM: SAMSUNG: Consolidate plat/pwm-clock.h
Removed - arch/arm/plat-s3c24xx/include/mach/pwm-clock.h - arch/arm/mach-s3c64xx/include/mach/pwm-clock.h - arch/arm/mach-s5p64x0/include/mach/pwm-clock.h - arch/arm/mach-s5pc100/include/mach/pwm-clock.h - arch/arm/mach-s5pv210/include/mach/pwm-clock.h - arch/arm/mach-exynos4/include/mach/pwm-clock.h And created - arch/arm/plat-samsung/include/plat/pwm-clock.h Cc: Ben Dooks <ben-linux@fluff.org> [kgene.kim@samsung.com: changed title] Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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@@ -27,7 +27,7 @@
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#include <plat/cpu.h>
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#include <plat/regs-timer.h>
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#include <mach/pwm-clock.h>
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#include <plat/pwm-clock.h>
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/* Each of the timers 0 through 5 go through the following
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* clock tree, with the inputs depending on the timers.
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@@ -339,8 +339,17 @@ static int clk_pwm_tin_set_parent(struct clk *clk, struct clk *parent)
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unsigned long bits;
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unsigned long shift = S3C2410_TCFG1_SHIFT(id);
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unsigned long mux_tclk;
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if (soc_is_s3c24xx())
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mux_tclk = S3C2410_TCFG1_MUX_TCLK;
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else if (soc_is_s5p6440() || soc_is_s5p6450())
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mux_tclk = 0;
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else
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mux_tclk = S3C64XX_TCFG1_MUX_TCLK;
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if (parent == s3c24xx_pwmclk_tclk(id))
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bits = S3C_TCFG1_MUX_TCLK << shift;
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bits = mux_tclk << shift;
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else if (parent == s3c24xx_pwmclk_tdiv(id))
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bits = clk_pwm_tdiv_bits(to_tdiv(parent)) << shift;
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else
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