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Merge branch 'topic/asoc' into next/asoc

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This commit is contained in:
Takashi Iwai
2009-01-15 18:27:20 +01:00
parent 5852973c12 eff317d083
commit c0106d72b8
4833 changed files with 726253 additions and 106683 deletions
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44
include/linux/mfd/da903x.h
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@@ -32,6 +32,7 @@ enum {
DA9030_ID_LDO18,
DA9030_ID_LDO19,
DA9030_ID_LDO_INT, /* LDO Internal */
DA9030_ID_BAT, /* battery charger */
DA9034_ID_LED_1,
DA9034_ID_LED_2,
@@ -93,6 +94,43 @@ struct da9034_touch_pdata {
int y_inverted;
};
/* DA9030 battery charger data */
struct power_supply_info;
struct da9030_battery_info {
/* battery parameters */
struct power_supply_info *battery_info;
/* current and voltage to use for battery charging */
unsigned int charge_milliamp;
unsigned int charge_millivolt;
/* voltage thresholds (in millivolts) */
int vbat_low;
int vbat_crit;
int vbat_charge_start;
int vbat_charge_stop;
int vbat_charge_restart;
/* battery nominal minimal and maximal voltages in millivolts */
int vcharge_min;
int vcharge_max;
/* Temperature thresholds. These are DA9030 register values
"as is" and should be measured for each battery type */
int tbat_low;
int tbat_high;
int tbat_restart;
/* battery monitor interval (seconds) */
unsigned int batmon_interval;
/* platform callbacks for battery low and critical events */
void (*battery_low)(void);
void (*battery_critical)(void);
};
struct da903x_subdev_info {
int id;
const char *name;
@@ -190,11 +228,13 @@ extern int da903x_unregister_notifier(struct device *dev,
extern int da903x_query_status(struct device *dev, unsigned int status);
/* NOTE: the two functions below are not intended for use outside
* of the DA9034 sub-device drivers
/* NOTE: the functions below are not intended for use outside
* of the DA903x sub-device drivers
*/
extern int da903x_write(struct device *dev, int reg, uint8_t val);
extern int da903x_writes(struct device *dev, int reg, int len, uint8_t *val);
extern int da903x_read(struct device *dev, int reg, uint8_t *val);
extern int da903x_reads(struct device *dev, int reg, int len, uint8_t *val);
extern int da903x_update(struct device *dev, int reg, uint8_t val, uint8_t mask);
extern int da903x_set_bits(struct device *dev, int reg, uint8_t bit_mask);
extern int da903x_clr_bits(struct device *dev, int reg, uint8_t bit_mask);

72
include/linux/mfd/pcf50633/adc.h Normal file
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@@ -0,0 +1,72 @@
/*
* adc.h -- Driver for NXP PCF50633 ADC
*
* (C) 2006-2008 by Openmoko, Inc.
* All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#ifndef __LINUX_MFD_PCF50633_ADC_H
#define __LINUX_MFD_PCF50633_ADC_H
#include <linux/mfd/pcf50633/core.h>
#include <linux/platform_device.h>
/* ADC Registers */
#define PCF50633_REG_ADCC3 0x52
#define PCF50633_REG_ADCC2 0x53
#define PCF50633_REG_ADCC1 0x54
#define PCF50633_REG_ADCS1 0x55
#define PCF50633_REG_ADCS2 0x56
#define PCF50633_REG_ADCS3 0x57
#define PCF50633_ADCC1_ADCSTART 0x01
#define PCF50633_ADCC1_RES_10BIT 0x02
#define PCF50633_ADCC1_AVERAGE_NO 0x00
#define PCF50633_ADCC1_AVERAGE_4 0x04
#define PCF50633_ADCC1_AVERAGE_8 0x08
#define PCF50633_ADCC1_AVERAGE_16 0x0c
#define PCF50633_ADCC1_MUX_BATSNS_RES 0x00
#define PCF50633_ADCC1_MUX_BATSNS_SUBTR 0x10
#define PCF50633_ADCC1_MUX_ADCIN2_RES 0x20
#define PCF50633_ADCC1_MUX_ADCIN2_SUBTR 0x30
#define PCF50633_ADCC1_MUX_BATTEMP 0x60
#define PCF50633_ADCC1_MUX_ADCIN1 0x70
#define PCF50633_ADCC1_AVERAGE_MASK 0x0c
#define PCF50633_ADCC1_ADCMUX_MASK 0xf0
#define PCF50633_ADCC2_RATIO_NONE 0x00
#define PCF50633_ADCC2_RATIO_BATTEMP 0x01
#define PCF50633_ADCC2_RATIO_ADCIN1 0x02
#define PCF50633_ADCC2_RATIO_BOTH 0x03
#define PCF50633_ADCC2_RATIOSETTL_100US 0x04
#define PCF50633_ADCC3_ACCSW_EN 0x01
#define PCF50633_ADCC3_NTCSW_EN 0x04
#define PCF50633_ADCC3_RES_DIV_TWO 0x10
#define PCF50633_ADCC3_RES_DIV_THREE 0x00
#define PCF50633_ADCS3_REF_NTCSW 0x00
#define PCF50633_ADCS3_REF_ACCSW 0x10
#define PCF50633_ADCS3_REF_2V0 0x20
#define PCF50633_ADCS3_REF_VISA 0x30
#define PCF50633_ADCS3_REF_2V0_2 0x70
#define PCF50633_ADCS3_ADCRDY 0x80
#define PCF50633_ADCS3_ADCDAT1L_MASK 0x03
#define PCF50633_ADCS3_ADCDAT2L_MASK 0x0c
#define PCF50633_ADCS3_ADCDAT2L_SHIFT 2
#define PCF50633_ASCS3_REF_MASK 0x70
extern int
pcf50633_adc_async_read(struct pcf50633 *pcf, int mux, int avg,
void (*callback)(struct pcf50633 *, void *, int),
void *callback_param);
extern int
pcf50633_adc_sync_read(struct pcf50633 *pcf, int mux, int avg);
#endif /* __LINUX_PCF50633_ADC_H */

218
include/linux/mfd/pcf50633/core.h Normal file
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@@ -0,0 +1,218 @@
/*
* core.h -- Core driver for NXP PCF50633
*
* (C) 2006-2008 by Openmoko, Inc.
* All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#ifndef __LINUX_MFD_PCF50633_CORE_H
#define __LINUX_MFD_PCF50633_CORE_H
#include <linux/i2c.h>
#include <linux/workqueue.h>
#include <linux/regulator/driver.h>
#include <linux/regulator/machine.h>
#include <linux/power_supply.h>
struct pcf50633;
#define PCF50633_NUM_REGULATORS 11
struct pcf50633_platform_data {
struct regulator_init_data reg_init_data[PCF50633_NUM_REGULATORS];
char **batteries;
int num_batteries;
/* Callbacks */
void (*probe_done)(struct pcf50633 *);
void (*mbc_event_callback)(struct pcf50633 *, int);
void (*regulator_registered)(struct pcf50633 *, int);
void (*force_shutdown)(struct pcf50633 *);
u8 resumers[5];
};
struct pcf50633_subdev_pdata {
struct pcf50633 *pcf;
};
struct pcf50633_irq {
void (*handler) (int, void *);
void *data;
};
int pcf50633_register_irq(struct pcf50633 *pcf, int irq,
void (*handler) (int, void *), void *data);
int pcf50633_free_irq(struct pcf50633 *pcf, int irq);
int pcf50633_irq_mask(struct pcf50633 *pcf, int irq);
int pcf50633_irq_unmask(struct pcf50633 *pcf, int irq);
int pcf50633_irq_mask_get(struct pcf50633 *pcf, int irq);
int pcf50633_read_block(struct pcf50633 *, u8 reg,
int nr_regs, u8 *data);
int pcf50633_write_block(struct pcf50633 *pcf, u8 reg,
int nr_regs, u8 *data);
u8 pcf50633_reg_read(struct pcf50633 *, u8 reg);
int pcf50633_reg_write(struct pcf50633 *pcf, u8 reg, u8 val);
int pcf50633_reg_set_bit_mask(struct pcf50633 *pcf, u8 reg, u8 mask, u8 val);
int pcf50633_reg_clear_bits(struct pcf50633 *pcf, u8 reg, u8 bits);
/* Interrupt registers */
#define PCF50633_REG_INT1 0x02
#define PCF50633_REG_INT2 0x03
#define PCF50633_REG_INT3 0x04
#define PCF50633_REG_INT4 0x05
#define PCF50633_REG_INT5 0x06
#define PCF50633_REG_INT1M 0x07
#define PCF50633_REG_INT2M 0x08
#define PCF50633_REG_INT3M 0x09
#define PCF50633_REG_INT4M 0x0a
#define PCF50633_REG_INT5M 0x0b
enum {
/* Chip IRQs */
PCF50633_IRQ_ADPINS,
PCF50633_IRQ_ADPREM,
PCF50633_IRQ_USBINS,
PCF50633_IRQ_USBREM,
PCF50633_IRQ_RESERVED1,
PCF50633_IRQ_RESERVED2,
PCF50633_IRQ_ALARM,
PCF50633_IRQ_SECOND,
PCF50633_IRQ_ONKEYR,
PCF50633_IRQ_ONKEYF,
PCF50633_IRQ_EXTON1R,
PCF50633_IRQ_EXTON1F,
PCF50633_IRQ_EXTON2R,
PCF50633_IRQ_EXTON2F,
PCF50633_IRQ_EXTON3R,
PCF50633_IRQ_EXTON3F,
PCF50633_IRQ_BATFULL,
PCF50633_IRQ_CHGHALT,
PCF50633_IRQ_THLIMON,
PCF50633_IRQ_THLIMOFF,
PCF50633_IRQ_USBLIMON,
PCF50633_IRQ_USBLIMOFF,
PCF50633_IRQ_ADCRDY,
PCF50633_IRQ_ONKEY1S,
PCF50633_IRQ_LOWSYS,
PCF50633_IRQ_LOWBAT,
PCF50633_IRQ_HIGHTMP,
PCF50633_IRQ_AUTOPWRFAIL,
PCF50633_IRQ_DWN1PWRFAIL,
PCF50633_IRQ_DWN2PWRFAIL,
PCF50633_IRQ_LEDPWRFAIL,
PCF50633_IRQ_LEDOVP,
PCF50633_IRQ_LDO1PWRFAIL,
PCF50633_IRQ_LDO2PWRFAIL,
PCF50633_IRQ_LDO3PWRFAIL,
PCF50633_IRQ_LDO4PWRFAIL,
PCF50633_IRQ_LDO5PWRFAIL,
PCF50633_IRQ_LDO6PWRFAIL,
PCF50633_IRQ_HCLDOPWRFAIL,
PCF50633_IRQ_HCLDOOVL,
/* Always last */
PCF50633_NUM_IRQ,
};
struct pcf50633 {
struct device *dev;
struct i2c_client *i2c_client;
struct pcf50633_platform_data *pdata;
int irq;
struct pcf50633_irq irq_handler[PCF50633_NUM_IRQ];
struct work_struct irq_work;
struct mutex lock;
u8 mask_regs[5];
u8 suspend_irq_masks[5];
u8 resume_reason[5];
int is_suspended;
int onkey1s_held;
struct platform_device *rtc_pdev;
struct platform_device *mbc_pdev;
struct platform_device *adc_pdev;
struct platform_device *input_pdev;
struct platform_device *regulator_pdev[PCF50633_NUM_REGULATORS];
};
enum pcf50633_reg_int1 {
PCF50633_INT1_ADPINS = 0x01, /* Adapter inserted */
PCF50633_INT1_ADPREM = 0x02, /* Adapter removed */
PCF50633_INT1_USBINS = 0x04, /* USB inserted */
PCF50633_INT1_USBREM = 0x08, /* USB removed */
/* reserved */
PCF50633_INT1_ALARM = 0x40, /* RTC alarm time is reached */
PCF50633_INT1_SECOND = 0x80, /* RTC periodic second interrupt */
};
enum pcf50633_reg_int2 {
PCF50633_INT2_ONKEYR = 0x01, /* ONKEY rising edge */
PCF50633_INT2_ONKEYF = 0x02, /* ONKEY falling edge */
PCF50633_INT2_EXTON1R = 0x04, /* EXTON1 rising edge */
PCF50633_INT2_EXTON1F = 0x08, /* EXTON1 falling edge */
PCF50633_INT2_EXTON2R = 0x10, /* EXTON2 rising edge */
PCF50633_INT2_EXTON2F = 0x20, /* EXTON2 falling edge */
PCF50633_INT2_EXTON3R = 0x40, /* EXTON3 rising edge */
PCF50633_INT2_EXTON3F = 0x80, /* EXTON3 falling edge */
};
enum pcf50633_reg_int3 {
PCF50633_INT3_BATFULL = 0x01, /* Battery full */
PCF50633_INT3_CHGHALT = 0x02, /* Charger halt */
PCF50633_INT3_THLIMON = 0x04,
PCF50633_INT3_THLIMOFF = 0x08,
PCF50633_INT3_USBLIMON = 0x10,
PCF50633_INT3_USBLIMOFF = 0x20,
PCF50633_INT3_ADCRDY = 0x40, /* ADC result ready */
PCF50633_INT3_ONKEY1S = 0x80, /* ONKEY pressed 1 second */
};
enum pcf50633_reg_int4 {
PCF50633_INT4_LOWSYS = 0x01,
PCF50633_INT4_LOWBAT = 0x02,
PCF50633_INT4_HIGHTMP = 0x04,
PCF50633_INT4_AUTOPWRFAIL = 0x08,
PCF50633_INT4_DWN1PWRFAIL = 0x10,
PCF50633_INT4_DWN2PWRFAIL = 0x20,
PCF50633_INT4_LEDPWRFAIL = 0x40,
PCF50633_INT4_LEDOVP = 0x80,
};
enum pcf50633_reg_int5 {
PCF50633_INT5_LDO1PWRFAIL = 0x01,
PCF50633_INT5_LDO2PWRFAIL = 0x02,
PCF50633_INT5_LDO3PWRFAIL = 0x04,
PCF50633_INT5_LDO4PWRFAIL = 0x08,
PCF50633_INT5_LDO5PWRFAIL = 0x10,
PCF50633_INT5_LDO6PWRFAIL = 0x20,
PCF50633_INT5_HCLDOPWRFAIL = 0x40,
PCF50633_INT5_HCLDOOVL = 0x80,
};
/* misc. registers */
#define PCF50633_REG_OOCSHDWN 0x0c
/* LED registers */
#define PCF50633_REG_LEDOUT 0x28
#define PCF50633_REG_LEDENA 0x29
#define PCF50633_REG_LEDCTL 0x2a
#define PCF50633_REG_LEDDIM 0x2b
#endif

52
include/linux/mfd/pcf50633/gpio.h Normal file
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@@ -0,0 +1,52 @@
/*
* gpio.h -- GPIO driver for NXP PCF50633
*
* (C) 2006-2008 by Openmoko, Inc.
* All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#ifndef __LINUX_MFD_PCF50633_GPIO_H
#define __LINUX_MFD_PCF50633_GPIO_H
#include <linux/mfd/pcf50633/core.h>
#define PCF50633_GPIO1 1
#define PCF50633_GPIO2 2
#define PCF50633_GPIO3 3
#define PCF50633_GPO 4
#define PCF50633_REG_GPIO1CFG 0x14
#define PCF50633_REG_GPIO2CFG 0x15
#define PCF50633_REG_GPIO3CFG 0x16
#define PCF50633_REG_GPOCFG 0x17
#define PCF50633_GPOCFG_GPOSEL_MASK 0x07
enum pcf50633_reg_gpocfg {
PCF50633_GPOCFG_GPOSEL_0 = 0x00,
PCF50633_GPOCFG_GPOSEL_LED_NFET = 0x01,
PCF50633_GPOCFG_GPOSEL_SYSxOK = 0x02,
PCF50633_GPOCFG_GPOSEL_CLK32K = 0x03,
PCF50633_GPOCFG_GPOSEL_ADAPUSB = 0x04,
PCF50633_GPOCFG_GPOSEL_USBxOK = 0x05,
PCF50633_GPOCFG_GPOSEL_ACTPH4 = 0x06,
PCF50633_GPOCFG_GPOSEL_1 = 0x07,
PCF50633_GPOCFG_GPOSEL_INVERSE = 0x08,
};
int pcf50633_gpio_set(struct pcf50633 *pcf, int gpio, u8 val);
u8 pcf50633_gpio_get(struct pcf50633 *pcf, int gpio);
int pcf50633_gpio_invert_set(struct pcf50633 *, int gpio, int invert);
int pcf50633_gpio_invert_get(struct pcf50633 *pcf, int gpio);
int pcf50633_gpio_power_supply_set(struct pcf50633 *,
int gpio, int regulator, int on);
#endif /* __LINUX_MFD_PCF50633_GPIO_H */

134
include/linux/mfd/pcf50633/mbc.h Normal file
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@@ -0,0 +1,134 @@
/*
* mbc.h -- Driver for NXP PCF50633 Main Battery Charger
*
* (C) 2006-2008 by Openmoko, Inc.
* All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#ifndef __LINUX_MFD_PCF50633_MBC_H
#define __LINUX_MFD_PCF50633_MBC_H
#include <linux/mfd/pcf50633/core.h>
#include <linux/platform_device.h>
#define PCF50633_REG_MBCC1 0x43
#define PCF50633_REG_MBCC2 0x44
#define PCF50633_REG_MBCC3 0x45
#define PCF50633_REG_MBCC4 0x46
#define PCF50633_REG_MBCC5 0x47
#define PCF50633_REG_MBCC6 0x48
#define PCF50633_REG_MBCC7 0x49
#define PCF50633_REG_MBCC8 0x4a
#define PCF50633_REG_MBCS1 0x4b
#define PCF50633_REG_MBCS2 0x4c
#define PCF50633_REG_MBCS3 0x4d
enum pcf50633_reg_mbcc1 {
PCF50633_MBCC1_CHGENA = 0x01, /* Charger enable */
PCF50633_MBCC1_AUTOSTOP = 0x02,
PCF50633_MBCC1_AUTORES = 0x04, /* automatic resume */
PCF50633_MBCC1_RESUME = 0x08, /* explicit resume cmd */
PCF50633_MBCC1_RESTART = 0x10, /* restart charging */
PCF50633_MBCC1_PREWDTIME_60M = 0x20, /* max. precharging time */
PCF50633_MBCC1_WDTIME_1H = 0x00,
PCF50633_MBCC1_WDTIME_2H = 0x40,
PCF50633_MBCC1_WDTIME_4H = 0x80,
PCF50633_MBCC1_WDTIME_6H = 0xc0,
};
#define PCF50633_MBCC1_WDTIME_MASK 0xc0
enum pcf50633_reg_mbcc2 {
PCF50633_MBCC2_VBATCOND_2V7 = 0x00,
PCF50633_MBCC2_VBATCOND_2V85 = 0x01,
PCF50633_MBCC2_VBATCOND_3V0 = 0x02,
PCF50633_MBCC2_VBATCOND_3V15 = 0x03,
PCF50633_MBCC2_VMAX_4V = 0x00,
PCF50633_MBCC2_VMAX_4V20 = 0x28,
PCF50633_MBCC2_VRESDEBTIME_64S = 0x80, /* debounce time (32/64sec) */
};
enum pcf50633_reg_mbcc7 {
PCF50633_MBCC7_USB_100mA = 0x00,
PCF50633_MBCC7_USB_500mA = 0x01,
PCF50633_MBCC7_USB_1000mA = 0x02,
PCF50633_MBCC7_USB_SUSPEND = 0x03,
PCF50633_MBCC7_BATTEMP_EN = 0x04,
PCF50633_MBCC7_BATSYSIMAX_1A6 = 0x00,
PCF50633_MBCC7_BATSYSIMAX_1A8 = 0x40,
PCF50633_MBCC7_BATSYSIMAX_2A0 = 0x80,
PCF50633_MBCC7_BATSYSIMAX_2A2 = 0xc0,
};
#define PCF50633_MBCC7_USB_MASK 0x03
enum pcf50633_reg_mbcc8 {
PCF50633_MBCC8_USBENASUS = 0x10,
};
enum pcf50633_reg_mbcs1 {
PCF50633_MBCS1_USBPRES = 0x01,
PCF50633_MBCS1_USBOK = 0x02,
PCF50633_MBCS1_ADAPTPRES = 0x04,
PCF50633_MBCS1_ADAPTOK = 0x08,
PCF50633_MBCS1_TBAT_OK = 0x00,
PCF50633_MBCS1_TBAT_ABOVE = 0x10,
PCF50633_MBCS1_TBAT_BELOW = 0x20,
PCF50633_MBCS1_TBAT_UNDEF = 0x30,
PCF50633_MBCS1_PREWDTEXP = 0x40,
PCF50633_MBCS1_WDTEXP = 0x80,
};
enum pcf50633_reg_mbcs2_mbcmod {
PCF50633_MBCS2_MBC_PLAY = 0x00,
PCF50633_MBCS2_MBC_USB_PRE = 0x01,
PCF50633_MBCS2_MBC_USB_PRE_WAIT = 0x02,
PCF50633_MBCS2_MBC_USB_FAST = 0x03,
PCF50633_MBCS2_MBC_USB_FAST_WAIT = 0x04,
PCF50633_MBCS2_MBC_USB_SUSPEND = 0x05,
PCF50633_MBCS2_MBC_ADP_PRE = 0x06,
PCF50633_MBCS2_MBC_ADP_PRE_WAIT = 0x07,
PCF50633_MBCS2_MBC_ADP_FAST = 0x08,
PCF50633_MBCS2_MBC_ADP_FAST_WAIT = 0x09,
PCF50633_MBCS2_MBC_BAT_FULL = 0x0a,
PCF50633_MBCS2_MBC_HALT = 0x0b,
};
#define PCF50633_MBCS2_MBC_MASK 0x0f
enum pcf50633_reg_mbcs2_chgstat {
PCF50633_MBCS2_CHGS_NONE = 0x00,
PCF50633_MBCS2_CHGS_ADAPTER = 0x10,
PCF50633_MBCS2_CHGS_USB = 0x20,
PCF50633_MBCS2_CHGS_BOTH = 0x30,
};
#define PCF50633_MBCS2_RESSTAT_AUTO 0x40
enum pcf50633_reg_mbcs3 {
PCF50633_MBCS3_USBLIM_PLAY = 0x01,
PCF50633_MBCS3_USBLIM_CGH = 0x02,
PCF50633_MBCS3_TLIM_PLAY = 0x04,
PCF50633_MBCS3_TLIM_CHG = 0x08,
PCF50633_MBCS3_ILIM = 0x10, /* 1: Ibat > Icutoff */
PCF50633_MBCS3_VLIM = 0x20, /* 1: Vbat == Vmax */
PCF50633_MBCS3_VBATSTAT = 0x40, /* 1: Vbat > Vbatcond */
PCF50633_MBCS3_VRES = 0x80, /* 1: Vbat > Vth(RES) */
};
#define PCF50633_MBCC2_VBATCOND_MASK 0x03
#define PCF50633_MBCC2_VMAX_MASK 0x3c
/* Charger status */
#define PCF50633_MBC_USB_ONLINE 0x01
#define PCF50633_MBC_USB_ACTIVE 0x02
#define PCF50633_MBC_ADAPTER_ONLINE 0x04
#define PCF50633_MBC_ADAPTER_ACTIVE 0x08
int pcf50633_mbc_usb_curlim_set(struct pcf50633 *pcf, int ma);
int pcf50633_mbc_get_status(struct pcf50633 *);
void pcf50633_mbc_set_status(struct pcf50633 *, int what, int status);
#endif

67
include/linux/mfd/pcf50633/pmic.h Normal file
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@@ -0,0 +1,67 @@
#ifndef __LINUX_MFD_PCF50633_PMIC_H
#define __LINUX_MFD_PCF50633_PMIC_H
#include <linux/mfd/pcf50633/core.h>
#include <linux/platform_device.h>
#define PCF50633_REG_AUTOOUT 0x1a
#define PCF50633_REG_AUTOENA 0x1b
#define PCF50633_REG_AUTOCTL 0x1c
#define PCF50633_REG_AUTOMXC 0x1d
#define PCF50633_REG_DOWN1OUT 0x1e
#define PCF50633_REG_DOWN1ENA 0x1f
#define PCF50633_REG_DOWN1CTL 0x20
#define PCF50633_REG_DOWN1MXC 0x21
#define PCF50633_REG_DOWN2OUT 0x22
#define PCF50633_REG_DOWN2ENA 0x23
#define PCF50633_REG_DOWN2CTL 0x24
#define PCF50633_REG_DOWN2MXC 0x25
#define PCF50633_REG_MEMLDOOUT 0x26
#define PCF50633_REG_MEMLDOENA 0x27
#define PCF50633_REG_LDO1OUT 0x2d
#define PCF50633_REG_LDO1ENA 0x2e
#define PCF50633_REG_LDO2OUT 0x2f
#define PCF50633_REG_LDO2ENA 0x30
#define PCF50633_REG_LDO3OUT 0x31
#define PCF50633_REG_LDO3ENA 0x32
#define PCF50633_REG_LDO4OUT 0x33
#define PCF50633_REG_LDO4ENA 0x34
#define PCF50633_REG_LDO5OUT 0x35
#define PCF50633_REG_LDO5ENA 0x36
#define PCF50633_REG_LDO6OUT 0x37
#define PCF50633_REG_LDO6ENA 0x38
#define PCF50633_REG_HCLDOOUT 0x39
#define PCF50633_REG_HCLDOENA 0x3a
#define PCF50633_REG_HCLDOOVL 0x40
enum pcf50633_regulator_enable {
PCF50633_REGULATOR_ON = 0x01,
PCF50633_REGULATOR_ON_GPIO1 = 0x02,
PCF50633_REGULATOR_ON_GPIO2 = 0x04,
PCF50633_REGULATOR_ON_GPIO3 = 0x08,
};
#define PCF50633_REGULATOR_ON_MASK 0x0f
enum pcf50633_regulator_phase {
PCF50633_REGULATOR_ACTPH1 = 0x00,
PCF50633_REGULATOR_ACTPH2 = 0x10,
PCF50633_REGULATOR_ACTPH3 = 0x20,
PCF50633_REGULATOR_ACTPH4 = 0x30,
};
#define PCF50633_REGULATOR_ACTPH_MASK 0x30
enum pcf50633_regulator_id {
PCF50633_REGULATOR_AUTO,
PCF50633_REGULATOR_DOWN1,
PCF50633_REGULATOR_DOWN2,
PCF50633_REGULATOR_LDO1,
PCF50633_REGULATOR_LDO2,
PCF50633_REGULATOR_LDO3,
PCF50633_REGULATOR_LDO4,
PCF50633_REGULATOR_LDO5,
PCF50633_REGULATOR_LDO6,
PCF50633_REGULATOR_HCLDO,
PCF50633_REGULATOR_MEMLDO,
};
#endif

8
include/linux/mfd/wm8350/comparator.h
View File

@@ -164,4 +164,12 @@
#define WM8350_AUXADC_BATT 6
#define WM8350_AUXADC_TEMP 7
struct wm8350;
/*
* AUX ADC Readback
*/
int wm8350_read_auxadc(struct wm8350 *wm8350, int channel, int scale,
int vref);
#endif

52
include/linux/mfd/wm8350/core.h
View File

@@ -29,6 +29,7 @@
*/
#define WM8350_RESET_ID 0x00
#define WM8350_ID 0x01
#define WM8350_REVISION 0x02
#define WM8350_SYSTEM_CONTROL_1 0x03
#define WM8350_SYSTEM_CONTROL_2 0x04
#define WM8350_SYSTEM_HIBERNATE 0x05
@@ -57,6 +58,10 @@
#define WM8350_OVER_CURRENT_INT_STATUS_MASK 0x25
#define WM8350_GPIO_INT_STATUS_MASK 0x26
#define WM8350_COMPARATOR_INT_STATUS_MASK 0x27
#define WM8350_CHARGER_OVERRIDES 0xE2
#define WM8350_MISC_OVERRIDES 0xE3
#define WM8350_COMPARATOR_OVERRIDES 0xE7
#define WM8350_STATE_MACHINE_STATUS 0xE9
#define WM8350_MAX_REGISTER 0xFF
@@ -76,6 +81,11 @@
#define WM8350_CONF_STS_MASK 0x0C00
#define WM8350_CUST_ID_MASK 0x00FF
/*
* R2 (0x02) - Revision
*/
#define WM8350_MASK_REV_MASK 0x00FF
/*
* R3 (0x03) - System Control 1
*/
@@ -523,6 +533,35 @@
#define WM8350_DC2_STS 0x0002
#define WM8350_DC1_STS 0x0001
/*
* R226 (0xE2) - Charger status
*/
#define WM8350_CHG_BATT_HOT_OVRDE 0x8000
#define WM8350_CHG_BATT_COLD_OVRDE 0x4000
/*
* R227 (0xE3) - Misc Overrides
*/
#define WM8350_USB_LIMIT_OVRDE 0x0400
/*
* R227 (0xE7) - Comparator Overrides
*/
#define WM8350_USB_FB_OVRDE 0x8000
#define WM8350_WALL_FB_OVRDE 0x4000
#define WM8350_BATT_FB_OVRDE 0x2000
/*
* R233 (0xE9) - State Machinine Status
*/
#define WM8350_USB_SM_MASK 0x0700
#define WM8350_USB_SM_SHIFT 8
#define WM8350_USB_SM_100_SLV 1
#define WM8350_USB_SM_500_SLV 5
#define WM8350_USB_SM_STDBY_SLV 7
/* WM8350 wake up conditions */
#define WM8350_IRQ_WKUP_OFF_STATE 43
#define WM8350_IRQ_WKUP_HIB_STATE 44
@@ -536,6 +575,7 @@
#define WM8350_REV_E 0x4
#define WM8350_REV_F 0x5
#define WM8350_REV_G 0x6
#define WM8350_REV_H 0x7
#define WM8350_NUM_IRQ 63
@@ -549,6 +589,14 @@ extern const u16 wm8350_mode0_defaults[];
extern const u16 wm8350_mode1_defaults[];
extern const u16 wm8350_mode2_defaults[];
extern const u16 wm8350_mode3_defaults[];
extern const u16 wm8351_mode0_defaults[];
extern const u16 wm8351_mode1_defaults[];
extern const u16 wm8351_mode2_defaults[];
extern const u16 wm8351_mode3_defaults[];
extern const u16 wm8352_mode0_defaults[];
extern const u16 wm8352_mode1_defaults[];
extern const u16 wm8352_mode2_defaults[];
extern const u16 wm8352_mode3_defaults[];
struct wm8350;
@@ -558,8 +606,6 @@ struct wm8350_irq {
};
struct wm8350 {
int rev; /* chip revision */
struct device *dev;
/* device IO */
@@ -572,6 +618,8 @@ struct wm8350 {
void *src);
u16 *reg_cache;
struct mutex auxadc_mutex;
/* Interrupt handling */
struct work_struct irq_work;
struct mutex irq_mutex; /* IRQ table mutex */

40
include/linux/mfd/wm8350/pmic.h
View File

@@ -13,6 +13,10 @@
#ifndef __LINUX_MFD_WM8350_PMIC_H
#define __LINUX_MFD_WM8350_PMIC_H
#include <linux/platform_device.h>
#include <linux/leds.h>
#include <linux/regulator/machine.h>
/*
* Register values.
*/
@@ -700,7 +704,38 @@ struct wm8350;
struct platform_device;
struct regulator_init_data;
/*
* WM8350 LED platform data
*/
struct wm8350_led_platform_data {
const char *name;
const char *default_trigger;
int max_uA;
};
struct wm8350_led {
struct platform_device *pdev;
struct mutex mutex;
struct work_struct work;
spinlock_t value_lock;
enum led_brightness value;
struct led_classdev cdev;
int max_uA_index;
int enabled;
struct regulator *isink;
struct regulator_consumer_supply isink_consumer;
struct regulator_init_data isink_init;
struct regulator *dcdc;
struct regulator_consumer_supply dcdc_consumer;
struct regulator_init_data dcdc_init;
};
struct wm8350_pmic {
/* Number of regulators of each type on this device */
int max_dcdc;
int max_isink;
/* ISINK to DCDC mapping */
int isink_A_dcdc;
int isink_B_dcdc;
@@ -713,10 +748,15 @@ struct wm8350_pmic {
/* regulator devices */
struct platform_device *pdev[NUM_WM8350_REGULATORS];
/* LED devices */
struct wm8350_led led[2];
};
int wm8350_register_regulator(struct wm8350 *wm8350, int reg,
struct regulator_init_data *initdata);
int wm8350_register_led(struct wm8350 *wm8350, int lednum, int dcdc, int isink,
struct wm8350_led_platform_data *pdata);
/*
* Additional DCDC control not supported via regulator API

25
include/linux/mfd/wm8350/supply.h
View File

@@ -13,7 +13,8 @@
#ifndef __LINUX_MFD_WM8350_SUPPLY_H_
#define __LINUX_MFD_WM8350_SUPPLY_H_
#include <linux/platform_device.h>
#include <linux/mutex.h>
#include <linux/power_supply.h>
/*
* Charger registers
@@ -104,8 +105,30 @@
#define WM8350_IRQ_EXT_WALL_FB 37
#define WM8350_IRQ_EXT_BAT_FB 38
/*
* Policy to control charger state machine.
*/
struct wm8350_charger_policy {
/* charger state machine policy - set in machine driver */
int eoc_mA; /* end of charge current (mA) */
int charge_mV; /* charge voltage */
int fast_limit_mA; /* fast charge current limit */
int fast_limit_USB_mA; /* USB fast charge current limit */
int charge_timeout; /* charge timeout (mins) */
int trickle_start_mV; /* trickle charge starts at mV */
int trickle_charge_mA; /* trickle charge current */
int trickle_charge_USB_mA; /* USB trickle charge current */
};
struct wm8350_power {
struct platform_device *pdev;
struct power_supply battery;
struct power_supply usb;
struct power_supply ac;
struct wm8350_charger_policy *policy;
int rev_g_coeff;
};
#endif