crypto: rockchip - add hash support for crypto engine in rk3288
Add md5 sha1 sha256 support for crypto engine in rk3288. Signed-off-by: Zain Wang <zain.wang@rock-chips.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
This commit is contained in:
Zain Wang
404
drivers/crypto/rockchip/rk3288_crypto_ahash.c
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404
drivers/crypto/rockchip/rk3288_crypto_ahash.c
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@@ -0,0 +1,404 @@
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/*
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* Crypto acceleration support for Rockchip RK3288
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*
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* Copyright (c) 2015, Fuzhou Rockchip Electronics Co., Ltd
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*
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* Author: Zain Wang <zain.wang@rock-chips.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* Some ideas are from marvell/cesa.c and s5p-sss.c driver.
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*/
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#include "rk3288_crypto.h"
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/*
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* IC can not process zero message hash,
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* so we put the fixed hash out when met zero message.
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*/
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static int zero_message_process(struct ahash_request *req)
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{
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struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
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int rk_digest_size = crypto_ahash_digestsize(tfm);
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switch (rk_digest_size) {
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case SHA1_DIGEST_SIZE:
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memcpy(req->result, sha1_zero_message_hash, rk_digest_size);
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break;
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case SHA256_DIGEST_SIZE:
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memcpy(req->result, sha256_zero_message_hash, rk_digest_size);
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break;
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case MD5_DIGEST_SIZE:
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memcpy(req->result, md5_zero_message_hash, rk_digest_size);
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break;
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default:
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return -EINVAL;
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}
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return 0;
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}
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static void rk_ahash_crypto_complete(struct rk_crypto_info *dev, int err)
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{
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if (dev->ahash_req->base.complete)
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dev->ahash_req->base.complete(&dev->ahash_req->base, err);
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}
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static void rk_ahash_reg_init(struct rk_crypto_info *dev)
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{
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int reg_status = 0;
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reg_status = CRYPTO_READ(dev, RK_CRYPTO_CTRL) |
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RK_CRYPTO_HASH_FLUSH | _SBF(0xffff, 16);
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CRYPTO_WRITE(dev, RK_CRYPTO_CTRL, reg_status);
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reg_status = CRYPTO_READ(dev, RK_CRYPTO_CTRL);
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reg_status &= (~RK_CRYPTO_HASH_FLUSH);
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reg_status |= _SBF(0xffff, 16);
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CRYPTO_WRITE(dev, RK_CRYPTO_CTRL, reg_status);
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memset_io(dev->reg + RK_CRYPTO_HASH_DOUT_0, 0, 32);
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CRYPTO_WRITE(dev, RK_CRYPTO_INTENA, RK_CRYPTO_HRDMA_ERR_ENA |
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RK_CRYPTO_HRDMA_DONE_ENA);
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CRYPTO_WRITE(dev, RK_CRYPTO_INTSTS, RK_CRYPTO_HRDMA_ERR_INT |
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RK_CRYPTO_HRDMA_DONE_INT);
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CRYPTO_WRITE(dev, RK_CRYPTO_HASH_CTRL, dev->mode |
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RK_CRYPTO_HASH_SWAP_DO);
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CRYPTO_WRITE(dev, RK_CRYPTO_CONF, RK_CRYPTO_BYTESWAP_HRFIFO |
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RK_CRYPTO_BYTESWAP_BRFIFO |
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RK_CRYPTO_BYTESWAP_BTFIFO);
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CRYPTO_WRITE(dev, RK_CRYPTO_HASH_MSG_LEN, dev->total);
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}
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static int rk_ahash_init(struct ahash_request *req)
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{
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struct rk_ahash_rctx *rctx = ahash_request_ctx(req);
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struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
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struct rk_ahash_ctx *ctx = crypto_ahash_ctx(tfm);
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ahash_request_set_tfm(&rctx->fallback_req, ctx->fallback_tfm);
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rctx->fallback_req.base.flags = req->base.flags &
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CRYPTO_TFM_REQ_MAY_SLEEP;
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return crypto_ahash_init(&rctx->fallback_req);
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}
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static int rk_ahash_update(struct ahash_request *req)
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{
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struct rk_ahash_rctx *rctx = ahash_request_ctx(req);
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struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
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struct rk_ahash_ctx *ctx = crypto_ahash_ctx(tfm);
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ahash_request_set_tfm(&rctx->fallback_req, ctx->fallback_tfm);
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rctx->fallback_req.base.flags = req->base.flags &
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CRYPTO_TFM_REQ_MAY_SLEEP;
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rctx->fallback_req.nbytes = req->nbytes;
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rctx->fallback_req.src = req->src;
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return crypto_ahash_update(&rctx->fallback_req);
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}
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static int rk_ahash_final(struct ahash_request *req)
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{
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struct rk_ahash_rctx *rctx = ahash_request_ctx(req);
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struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
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struct rk_ahash_ctx *ctx = crypto_ahash_ctx(tfm);
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ahash_request_set_tfm(&rctx->fallback_req, ctx->fallback_tfm);
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rctx->fallback_req.base.flags = req->base.flags &
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CRYPTO_TFM_REQ_MAY_SLEEP;
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rctx->fallback_req.result = req->result;
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return crypto_ahash_final(&rctx->fallback_req);
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}
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static int rk_ahash_finup(struct ahash_request *req)
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{
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struct rk_ahash_rctx *rctx = ahash_request_ctx(req);
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struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
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struct rk_ahash_ctx *ctx = crypto_ahash_ctx(tfm);
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ahash_request_set_tfm(&rctx->fallback_req, ctx->fallback_tfm);
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rctx->fallback_req.base.flags = req->base.flags &
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CRYPTO_TFM_REQ_MAY_SLEEP;
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rctx->fallback_req.nbytes = req->nbytes;
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rctx->fallback_req.src = req->src;
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rctx->fallback_req.result = req->result;
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return crypto_ahash_finup(&rctx->fallback_req);
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}
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static int rk_ahash_import(struct ahash_request *req, const void *in)
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{
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struct rk_ahash_rctx *rctx = ahash_request_ctx(req);
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struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
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struct rk_ahash_ctx *ctx = crypto_ahash_ctx(tfm);
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ahash_request_set_tfm(&rctx->fallback_req, ctx->fallback_tfm);
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rctx->fallback_req.base.flags = req->base.flags &
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CRYPTO_TFM_REQ_MAY_SLEEP;
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return crypto_ahash_import(&rctx->fallback_req, in);
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}
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static int rk_ahash_export(struct ahash_request *req, void *out)
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{
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struct rk_ahash_rctx *rctx = ahash_request_ctx(req);
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struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
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struct rk_ahash_ctx *ctx = crypto_ahash_ctx(tfm);
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ahash_request_set_tfm(&rctx->fallback_req, ctx->fallback_tfm);
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rctx->fallback_req.base.flags = req->base.flags &
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CRYPTO_TFM_REQ_MAY_SLEEP;
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return crypto_ahash_export(&rctx->fallback_req, out);
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}
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static int rk_ahash_digest(struct ahash_request *req)
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{
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struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
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struct rk_ahash_ctx *tctx = crypto_tfm_ctx(req->base.tfm);
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struct rk_crypto_info *dev = NULL;
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unsigned long flags;
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int ret;
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if (!req->nbytes)
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return zero_message_process(req);
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dev = tctx->dev;
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dev->total = req->nbytes;
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dev->left_bytes = req->nbytes;
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dev->aligned = 0;
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dev->mode = 0;
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dev->align_size = 4;
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dev->sg_dst = NULL;
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dev->sg_src = req->src;
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dev->first = req->src;
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dev->nents = sg_nents(req->src);
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switch (crypto_ahash_digestsize(tfm)) {
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case SHA1_DIGEST_SIZE:
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dev->mode = RK_CRYPTO_HASH_SHA1;
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break;
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case SHA256_DIGEST_SIZE:
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dev->mode = RK_CRYPTO_HASH_SHA256;
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break;
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case MD5_DIGEST_SIZE:
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dev->mode = RK_CRYPTO_HASH_MD5;
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break;
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default:
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return -EINVAL;
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}
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rk_ahash_reg_init(dev);
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spin_lock_irqsave(&dev->lock, flags);
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ret = crypto_enqueue_request(&dev->queue, &req->base);
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spin_unlock_irqrestore(&dev->lock, flags);
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tasklet_schedule(&dev->crypto_tasklet);
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/*
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* it will take some time to process date after last dma transmission.
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*
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* waiting time is relative with the last date len,
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* so cannot set a fixed time here.
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* 10-50 makes system not call here frequently wasting
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* efficiency, and make it response quickly when dma
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* complete.
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*/
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while (!CRYPTO_READ(dev, RK_CRYPTO_HASH_STS))
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usleep_range(10, 50);
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memcpy_fromio(req->result, dev->reg + RK_CRYPTO_HASH_DOUT_0,
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crypto_ahash_digestsize(tfm));
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return 0;
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}
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static void crypto_ahash_dma_start(struct rk_crypto_info *dev)
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{
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CRYPTO_WRITE(dev, RK_CRYPTO_HRDMAS, dev->addr_in);
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CRYPTO_WRITE(dev, RK_CRYPTO_HRDMAL, (dev->count + 3) / 4);
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CRYPTO_WRITE(dev, RK_CRYPTO_CTRL, RK_CRYPTO_HASH_START |
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(RK_CRYPTO_HASH_START << 16));
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}
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static int rk_ahash_set_data_start(struct rk_crypto_info *dev)
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{
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int err;
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err = dev->load_data(dev, dev->sg_src, NULL);
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if (!err)
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crypto_ahash_dma_start(dev);
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return err;
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}
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static int rk_ahash_start(struct rk_crypto_info *dev)
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{
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return rk_ahash_set_data_start(dev);
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}
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static int rk_ahash_crypto_rx(struct rk_crypto_info *dev)
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{
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int err = 0;
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dev->unload_data(dev);
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if (dev->left_bytes) {
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if (dev->aligned) {
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if (sg_is_last(dev->sg_src)) {
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dev_warn(dev->dev, "[%s:%d], Lack of data\n",
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__func__, __LINE__);
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err = -ENOMEM;
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goto out_rx;
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}
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dev->sg_src = sg_next(dev->sg_src);
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}
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err = rk_ahash_set_data_start(dev);
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} else {
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dev->complete(dev, 0);
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}
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out_rx:
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return err;
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}
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static int rk_cra_hash_init(struct crypto_tfm *tfm)
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{
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struct rk_ahash_ctx *tctx = crypto_tfm_ctx(tfm);
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struct rk_crypto_tmp *algt;
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struct ahash_alg *alg = __crypto_ahash_alg(tfm->__crt_alg);
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const char *alg_name = crypto_tfm_alg_name(tfm);
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algt = container_of(alg, struct rk_crypto_tmp, alg.hash);
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tctx->dev = algt->dev;
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tctx->dev->addr_vir = (void *)__get_free_page(GFP_KERNEL);
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if (!tctx->dev->addr_vir) {
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dev_err(tctx->dev->dev, "failed to kmalloc for addr_vir\n");
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return -ENOMEM;
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}
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tctx->dev->start = rk_ahash_start;
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tctx->dev->update = rk_ahash_crypto_rx;
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tctx->dev->complete = rk_ahash_crypto_complete;
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/* for fallback */
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tctx->fallback_tfm = crypto_alloc_ahash(alg_name, 0,
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CRYPTO_ALG_NEED_FALLBACK);
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if (IS_ERR(tctx->fallback_tfm)) {
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dev_err(tctx->dev->dev, "Could not load fallback driver.\n");
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return PTR_ERR(tctx->fallback_tfm);
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}
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crypto_ahash_set_reqsize(__crypto_ahash_cast(tfm),
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sizeof(struct rk_ahash_rctx) +
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crypto_ahash_reqsize(tctx->fallback_tfm));
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return tctx->dev->enable_clk(tctx->dev);
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}
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static void rk_cra_hash_exit(struct crypto_tfm *tfm)
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{
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struct rk_ahash_ctx *tctx = crypto_tfm_ctx(tfm);
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free_page((unsigned long)tctx->dev->addr_vir);
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return tctx->dev->disable_clk(tctx->dev);
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}
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struct rk_crypto_tmp rk_ahash_sha1 = {
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.type = ALG_TYPE_HASH,
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.alg.hash = {
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.init = rk_ahash_init,
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.update = rk_ahash_update,
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.final = rk_ahash_final,
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.finup = rk_ahash_finup,
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.export = rk_ahash_export,
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.import = rk_ahash_import,
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.digest = rk_ahash_digest,
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.halg = {
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.digestsize = SHA1_DIGEST_SIZE,
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.statesize = sizeof(struct sha1_state),
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.base = {
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.cra_name = "sha1",
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.cra_driver_name = "rk-sha1",
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.cra_priority = 300,
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.cra_flags = CRYPTO_ALG_ASYNC |
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CRYPTO_ALG_NEED_FALLBACK,
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.cra_blocksize = SHA1_BLOCK_SIZE,
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.cra_ctxsize = sizeof(struct rk_ahash_ctx),
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.cra_alignmask = 3,
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.cra_init = rk_cra_hash_init,
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.cra_exit = rk_cra_hash_exit,
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.cra_module = THIS_MODULE,
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}
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}
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}
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};
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struct rk_crypto_tmp rk_ahash_sha256 = {
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.type = ALG_TYPE_HASH,
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.alg.hash = {
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.init = rk_ahash_init,
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.update = rk_ahash_update,
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.final = rk_ahash_final,
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.finup = rk_ahash_finup,
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.export = rk_ahash_export,
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.import = rk_ahash_import,
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.digest = rk_ahash_digest,
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.halg = {
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.digestsize = SHA256_DIGEST_SIZE,
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.statesize = sizeof(struct sha256_state),
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.base = {
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.cra_name = "sha256",
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.cra_driver_name = "rk-sha256",
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.cra_priority = 300,
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.cra_flags = CRYPTO_ALG_ASYNC |
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CRYPTO_ALG_NEED_FALLBACK,
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.cra_blocksize = SHA256_BLOCK_SIZE,
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.cra_ctxsize = sizeof(struct rk_ahash_ctx),
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.cra_alignmask = 3,
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.cra_init = rk_cra_hash_init,
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.cra_exit = rk_cra_hash_exit,
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.cra_module = THIS_MODULE,
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}
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}
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}
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};
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struct rk_crypto_tmp rk_ahash_md5 = {
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.type = ALG_TYPE_HASH,
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.alg.hash = {
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.init = rk_ahash_init,
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.update = rk_ahash_update,
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.final = rk_ahash_final,
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.finup = rk_ahash_finup,
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.export = rk_ahash_export,
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.import = rk_ahash_import,
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.digest = rk_ahash_digest,
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.halg = {
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.digestsize = MD5_DIGEST_SIZE,
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.statesize = sizeof(struct md5_state),
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.base = {
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.cra_name = "md5",
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.cra_driver_name = "rk-md5",
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.cra_priority = 300,
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.cra_flags = CRYPTO_ALG_ASYNC |
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CRYPTO_ALG_NEED_FALLBACK,
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.cra_blocksize = SHA1_BLOCK_SIZE,
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.cra_ctxsize = sizeof(struct rk_ahash_ctx),
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.cra_alignmask = 3,
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.cra_init = rk_cra_hash_init,
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.cra_exit = rk_cra_hash_exit,
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.cra_module = THIS_MODULE,
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}
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}
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}
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};
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