Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus
Pull MIPS updates from Ralf Baechle: "This is the main pull request for MIPS for Linux 4.1. Most noteworthy: - Add more Octeon-optimized crypto functions - Octeon crypto preemption and locking fixes - Little endian support for Octeon - Use correct CSR to soft reset Octeons - Support LEDs on the Octeon-based DSR-1000N - Fix PCI interrupt mapping for the Octeon-based DSR-1000N - Mark prom_free_prom_memory() as __init for a number of systems - Support for Imagination's Pistachio SOC. This includes arch and CLK bits. I'd like to merge pinctrl bits later - Improve parallelism of csum_partial for certain pipelines - Organize DTB files in subdirs like other architectures - Implement read_sched_clock for all MIPS platforms other than Octeon - Massive series of 38 fixes and cleanups for the FPU emulator / kernel - Further FPU remulator work to support new features. This sits on a separate branch which also has been pulled into the 4.1 KVM branch - Clean up and fixes for the SEAD3 eval board; remove unused file - Various updates for Netlogic platforms - A number of small updates for Loongson 3 platforms - Increase the memory limit for ATH79 platforms to 256MB - A fair number of fixes and updates for BCM47xx platforms - Finish the implementation of XPA support - MIPS FDC support. No, not floppy controller but Fast Debug Channel :) - Detect the R16000 used in SGI legacy platforms - Fix Kconfig dependencies for the SSB bus support" * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (265 commits) MIPS: Makefile: Fix MIPS ASE detection code MIPS: asm: elf: Set O32 default FPU flags MIPS: BCM47XX: Fix detecting Microsoft MN-700 & Asus WL500G MIPS: Kconfig: Disable SMP/CPS for 64-bit MIPS: Hibernate: flush TLB entries earlier MIPS: smp-cps: cpu_set FPU mask if FPU present MIPS: lose_fpu(): Disable FPU when MSA enabled MIPS: ralink: add missing symbol for RALINK_ILL_ACC MIPS: ralink: Fix bad config symbol in PCI makefile. SSB: fix Kconfig dependencies MIPS: Malta: Detect and fix bad memsize values Revert "MIPS: Avoid pipeline stalls on some MIPS32R2 cores." MIPS: Octeon: Delete override of cpu_has_mips_r2_exec_hazard. MIPS: Fix cpu_has_mips_r2_exec_hazard. MIPS: kernel: entry.S: Set correct ISA level for mips_ihb MIPS: asm: spinlock: Fix addiu instruction for R10000_LLSC_WAR case MIPS: r4kcache: Use correct base register for MIPS R6 cache flushes MIPS: Kconfig: Fix typo for the r2-to-r6 emulator kernel parameter MIPS: unaligned: Fix regular load/store instruction emulation for EVA MIPS: unaligned: Surround load/store macros in do {} while statements ...
This commit is contained in:
34
include/linux/bcm47xx_nvram.h
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34
include/linux/bcm47xx_nvram.h
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@@ -0,0 +1,34 @@
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/*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#ifndef __BCM47XX_NVRAM_H
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#define __BCM47XX_NVRAM_H
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#include <linux/types.h>
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#include <linux/kernel.h>
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#ifdef CONFIG_BCM47XX
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int bcm47xx_nvram_init_from_mem(u32 base, u32 lim);
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int bcm47xx_nvram_getenv(const char *name, char *val, size_t val_len);
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int bcm47xx_nvram_gpio_pin(const char *name);
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#else
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static inline int bcm47xx_nvram_init_from_mem(u32 base, u32 lim)
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{
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return -ENOTSUPP;
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};
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static inline int bcm47xx_nvram_getenv(const char *name, char *val,
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size_t val_len)
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{
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return -ENOTSUPP;
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};
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static inline int bcm47xx_nvram_gpio_pin(const char *name)
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{
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return -ENOTSUPP;
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};
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#endif
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#endif /* __BCM47XX_NVRAM_H */
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@@ -165,6 +165,8 @@
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#define GIC_VPE_PEND_SWINT0_MSK (MSK(1) << GIC_VPE_PEND_SWINT0_SHF)
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#define GIC_VPE_PEND_SWINT1_SHF 5
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#define GIC_VPE_PEND_SWINT1_MSK (MSK(1) << GIC_VPE_PEND_SWINT1_SHF)
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#define GIC_VPE_PEND_FDC_SHF 6
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#define GIC_VPE_PEND_FDC_MSK (MSK(1) << GIC_VPE_PEND_FDC_SHF)
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/* GIC_VPE_RMASK Masks */
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#define GIC_VPE_RMASK_WD_SHF 0
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@@ -179,6 +181,8 @@
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#define GIC_VPE_RMASK_SWINT0_MSK (MSK(1) << GIC_VPE_RMASK_SWINT0_SHF)
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#define GIC_VPE_RMASK_SWINT1_SHF 5
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#define GIC_VPE_RMASK_SWINT1_MSK (MSK(1) << GIC_VPE_RMASK_SWINT1_SHF)
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#define GIC_VPE_RMASK_FDC_SHF 6
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#define GIC_VPE_RMASK_FDC_MSK (MSK(1) << GIC_VPE_RMASK_FDC_SHF)
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/* GIC_VPE_SMASK Masks */
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#define GIC_VPE_SMASK_WD_SHF 0
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@@ -193,6 +197,8 @@
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#define GIC_VPE_SMASK_SWINT0_MSK (MSK(1) << GIC_VPE_SMASK_SWINT0_SHF)
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#define GIC_VPE_SMASK_SWINT1_SHF 5
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#define GIC_VPE_SMASK_SWINT1_MSK (MSK(1) << GIC_VPE_SMASK_SWINT1_SHF)
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#define GIC_VPE_SMASK_FDC_SHF 6
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#define GIC_VPE_SMASK_FDC_MSK (MSK(1) << GIC_VPE_SMASK_FDC_SHF)
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/* GIC nomenclature for Core Interrupt Pins. */
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#define GIC_CPU_INT0 0 /* Core Interrupt 2 */
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@@ -247,4 +253,5 @@ extern unsigned int plat_ipi_call_int_xlate(unsigned int);
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extern unsigned int plat_ipi_resched_int_xlate(unsigned int);
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extern int gic_get_c0_compare_int(void);
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extern int gic_get_c0_perfcount_int(void);
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extern int gic_get_c0_fdc_int(void);
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#endif /* __LINUX_IRQCHIP_MIPS_GIC_H */
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@@ -546,6 +546,14 @@ struct amba_id {
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void *data;
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};
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/**
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* struct mips_cdmm_device_id - identifies devices in MIPS CDMM bus
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* @type: Device type identifier.
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*/
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struct mips_cdmm_device_id {
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__u8 type;
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};
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/*
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* Match x86 CPUs for CPU specific drivers.
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* See documentation of "x86_match_cpu" for details.
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