s390/uaccess: simplify control register updates
Always switch to the kernel ASCE in switch_mm. Load the secondary space ASCE in finish_arch_post_lock_switch after checking that any pending page table operations have completed. The primary ASCE is loaded in entry[64].S. With this the update_primary_asce call can be removed from the switch_to macro and from the start of switch_mm function. Remove the load_primary argument from update_user_asce/clear_user_asce, rename update_user_asce to set_user_asce and rename update_primary_asce to load_kernel_asce. Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
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@@ -81,8 +81,7 @@ static inline struct thread_info *current_thread_info(void)
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#define TIF_NOTIFY_RESUME 1 /* callback before returning to user */
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#define TIF_SIGPENDING 2 /* signal pending */
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#define TIF_NEED_RESCHED 3 /* rescheduling necessary */
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#define TIF_TLB_WAIT 4 /* wait for TLB flush completion */
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#define TIF_ASCE 5 /* primary asce needs fixup / uaccess */
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#define TIF_ASCE 5 /* user asce needs fixup / uaccess */
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#define TIF_PER_TRAP 6 /* deliver sigtrap on return to user */
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#define TIF_MCCK_PENDING 7 /* machine check handling is pending */
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#define TIF_SYSCALL_TRACE 8 /* syscall trace active */
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@@ -99,7 +98,6 @@ static inline struct thread_info *current_thread_info(void)
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#define _TIF_NOTIFY_RESUME (1<<TIF_NOTIFY_RESUME)
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#define _TIF_SIGPENDING (1<<TIF_SIGPENDING)
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#define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED)
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#define _TIF_TLB_WAIT (1<<TIF_TLB_WAIT)
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#define _TIF_ASCE (1<<TIF_ASCE)
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#define _TIF_PER_TRAP (1<<TIF_PER_TRAP)
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#define _TIF_MCCK_PENDING (1<<TIF_MCCK_PENDING)
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