Merge tag 'powerpc-5.3-2' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux
Pull powerpc fixes from Michael Ellerman: "An assortment of non-regression fixes that have accumulated since the start of the merge window. - A fix for a user triggerable oops on machines where transactional memory is disabled, eg. Power9 bare metal, Power8 with TM disabled on the command line, or all Power7 or earlier machines. - Three fixes for handling of PMU and power saving registers when running nested KVM on Power9. - Two fixes for bugs found while stress testing the XIVE interrupt controller code, also on Power9. - A fix to allow guests to boot under Qemu/KVM on Power9 using the the Hash MMU with >= 1TB of memory. - Two fixes for bugs in the recent DMA cleanup, one of which could lead to checkstops. - And finally three fixes for the PAPR SCM nvdimm driver. Thanks to: Alexey Kardashevskiy, Andrea Arcangeli, Cédric Le Goater, Christoph Hellwig, David Gibson, Gautham R. Shenoy, Michael Neuling, Oliver O'Halloran, Satheesh Rajendran, Shawn Anastasio, Suraj Jitindar Singh, Vaibhav Jain" * tag 'powerpc-5.3-2' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux: powerpc/papr_scm: Force a scm-unbind if initial scm-bind fails powerpc/papr_scm: Update drc_pmem_unbind() to use H_SCM_UNBIND_ALL powerpc/pseries: Update SCM hcall op-codes in hvcall.h powerpc/tm: Fix oops on sigreturn on systems without TM powerpc/dma: Fix invalid DMA mmap behavior KVM: PPC: Book3S HV: XIVE: fix rollback when kvmppc_xive_create fails powerpc/xive: Fix loop exit-condition in xive_find_target_in_mask() powerpc: fix off by one in max_zone_pfn initialization for ZONE_DMA KVM: PPC: Book3S HV: Save and restore guest visible PSSCR bits on pseries powerpc/pmu: Set pmcregs_in_use in paca when running as LPAR KVM: PPC: Book3S HV: Always save guest pmu for guest capable of nesting powerpc/mm: Limit rma_size to 1TB when running without HV mode
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@@ -1899,11 +1899,20 @@ void hash__setup_initial_memory_limit(phys_addr_t first_memblock_base,
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*
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* For guests on platforms before POWER9, we clamp the it limit to 1G
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* to avoid some funky things such as RTAS bugs etc...
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*
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* On POWER9 we limit to 1TB in case the host erroneously told us that
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* the RMA was >1TB. Effective address bits 0:23 are treated as zero
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* (meaning the access is aliased to zero i.e. addr = addr % 1TB)
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* for virtual real mode addressing and so it doesn't make sense to
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* have an area larger than 1TB as it can't be addressed.
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*/
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if (!early_cpu_has_feature(CPU_FTR_HVMODE)) {
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ppc64_rma_size = first_memblock_size;
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if (!early_cpu_has_feature(CPU_FTR_ARCH_300))
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ppc64_rma_size = min_t(u64, ppc64_rma_size, 0x40000000);
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else
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ppc64_rma_size = min_t(u64, ppc64_rma_size,
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1UL << SID_SHIFT_1T);
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/* Finally limit subsequent allocations */
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memblock_set_current_limit(ppc64_rma_size);
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@@ -239,7 +239,7 @@ void __init paging_init(void)
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#ifdef CONFIG_ZONE_DMA
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max_zone_pfns[ZONE_DMA] = min(max_low_pfn,
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((1UL << ARCH_ZONE_DMA_BITS) - 1) >> PAGE_SHIFT);
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1UL << (ARCH_ZONE_DMA_BITS - PAGE_SHIFT));
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#endif
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max_zone_pfns[ZONE_NORMAL] = max_low_pfn;
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#ifdef CONFIG_HIGHMEM
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