Merge branch 'misc' into for-linus
Conflicts: arch/arm/mach-integrator/integrator_ap.c
Cette révision appartient à :
@@ -49,9 +49,6 @@ extern void __aeabi_ulcmp(void);
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extern void fpundefinstr(void);
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EXPORT_SYMBOL(__backtrace);
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/* platform dependent support */
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EXPORT_SYMBOL(__udelay);
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EXPORT_SYMBOL(__const_udelay);
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@@ -151,6 +151,8 @@ printhex: adr r2, hexbuf
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b printascii
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ENDPROC(printhex2)
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hexbuf: .space 16
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.ltorg
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ENTRY(printascii)
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@@ -175,5 +177,3 @@ ENTRY(printch)
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mov r0, #0
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b 1b
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ENDPROC(printch)
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hexbuf: .space 16
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@@ -24,6 +24,7 @@
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#include <asm/unwind.h>
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#include <asm/unistd.h>
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#include <asm/tls.h>
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#include <asm/system.h>
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#include "entry-header.S"
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#include <asm/entry-macro-multi.S>
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@@ -262,8 +263,7 @@ __und_svc:
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ldr r0, [r4, #-4]
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#else
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ldrh r0, [r4, #-2] @ Thumb instruction at LR - 2
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and r9, r0, #0xf800
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cmp r9, #0xe800 @ 32-bit instruction if xx >= 0
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cmp r0, #0xe800 @ 32-bit instruction if xx >= 0
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ldrhhs r9, [r4] @ bottom 16 bits
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orrhs r0, r9, r0, lsl #16
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#endif
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@@ -440,18 +440,46 @@ __und_usr:
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#endif
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beq call_fpe
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@ Thumb instruction
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#if __LINUX_ARM_ARCH__ >= 7
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#if CONFIG_ARM_THUMB && __LINUX_ARM_ARCH__ >= 6 && CONFIG_CPU_V7
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/*
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* Thumb-2 instruction handling. Note that because pre-v6 and >= v6 platforms
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* can never be supported in a single kernel, this code is not applicable at
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* all when __LINUX_ARM_ARCH__ < 6. This allows simplifying assumptions to be
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* made about .arch directives.
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*/
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#if __LINUX_ARM_ARCH__ < 7
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/* If the target CPU may not be Thumb-2-capable, a run-time check is needed: */
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#define NEED_CPU_ARCHITECTURE
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ldr r5, .LCcpu_architecture
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ldr r5, [r5]
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cmp r5, #CPU_ARCH_ARMv7
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blo __und_usr_unknown
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/*
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* The following code won't get run unless the running CPU really is v7, so
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* coding round the lack of ldrht on older arches is pointless. Temporarily
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* override the assembler target arch with the minimum required instead:
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*/
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.arch armv6t2
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#endif
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2:
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ARM( ldrht r5, [r4], #2 )
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THUMB( ldrht r5, [r4] )
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THUMB( add r4, r4, #2 )
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and r0, r5, #0xf800 @ mask bits 111x x... .... ....
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cmp r0, #0xe800 @ 32bit instruction if xx != 0
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cmp r5, #0xe800 @ 32bit instruction if xx != 0
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blo __und_usr_unknown
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3: ldrht r0, [r4]
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add r2, r2, #2 @ r2 is PC + 2, make it PC + 4
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orr r0, r0, r5, lsl #16
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#if __LINUX_ARM_ARCH__ < 7
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/* If the target arch was overridden, change it back: */
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#ifdef CONFIG_CPU_32v6K
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.arch armv6k
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#else
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.arch armv6
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#endif
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#endif /* __LINUX_ARM_ARCH__ < 7 */
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#else /* !(CONFIG_ARM_THUMB && __LINUX_ARM_ARCH__ >= 6 && CONFIG_CPU_V7) */
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b __und_usr_unknown
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#endif
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UNWIND(.fnend )
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@@ -578,6 +606,12 @@ call_fpe:
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movw_pc lr @ CP#14 (Debug)
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movw_pc lr @ CP#15 (Control)
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#ifdef NEED_CPU_ARCHITECTURE
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.align 2
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.LCcpu_architecture:
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.word __cpu_architecture
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#endif
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#ifdef CONFIG_NEON
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.align 6
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@@ -32,6 +32,24 @@ static atomic_t waiting_for_crash_ipi;
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int machine_kexec_prepare(struct kimage *image)
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{
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unsigned long page_list;
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void *reboot_code_buffer;
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page_list = image->head & PAGE_MASK;
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reboot_code_buffer = page_address(image->control_code_page);
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/* Prepare parameters for reboot_code_buffer*/
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kexec_start_address = image->start;
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kexec_indirection_page = page_list;
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kexec_mach_type = machine_arch_type;
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kexec_boot_atags = image->start - KEXEC_ARM_ZIMAGE_OFFSET + KEXEC_ARM_ATAGS_OFFSET;
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/* copy our kernel relocation code to the control code page */
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memcpy(reboot_code_buffer,
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relocate_new_kernel, relocate_new_kernel_size);
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flush_icache_range((unsigned long) reboot_code_buffer,
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(unsigned long) reboot_code_buffer + KEXEC_CONTROL_PAGE_SIZE);
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return 0;
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}
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@@ -82,31 +100,14 @@ void (*kexec_reinit)(void);
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void machine_kexec(struct kimage *image)
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{
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unsigned long page_list;
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unsigned long reboot_code_buffer_phys;
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void *reboot_code_buffer;
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page_list = image->head & PAGE_MASK;
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/* we need both effective and real address here */
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reboot_code_buffer_phys =
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page_to_pfn(image->control_code_page) << PAGE_SHIFT;
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reboot_code_buffer = page_address(image->control_code_page);
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/* Prepare parameters for reboot_code_buffer*/
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kexec_start_address = image->start;
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kexec_indirection_page = page_list;
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kexec_mach_type = machine_arch_type;
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kexec_boot_atags = image->start - KEXEC_ARM_ZIMAGE_OFFSET + KEXEC_ARM_ATAGS_OFFSET;
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/* copy our kernel relocation code to the control code page */
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memcpy(reboot_code_buffer,
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relocate_new_kernel, relocate_new_kernel_size);
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flush_icache_range((unsigned long) reboot_code_buffer,
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(unsigned long) reboot_code_buffer + KEXEC_CONTROL_PAGE_SIZE);
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printk(KERN_INFO "Bye!\n");
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if (kexec_reinit)
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@@ -319,7 +319,7 @@ void show_regs(struct pt_regs * regs)
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printk("\n");
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printk("Pid: %d, comm: %20s\n", task_pid_nr(current), current->comm);
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__show_regs(regs);
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__backtrace();
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dump_stack();
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}
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ATOMIC_NOTIFIER_HEAD(thread_notify_head);
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@@ -29,6 +29,8 @@
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#include <linux/fs.h>
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#include <linux/proc_fs.h>
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#include <linux/memblock.h>
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#include <linux/bug.h>
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#include <linux/compiler.h>
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#include <asm/unified.h>
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#include <asm/cpu.h>
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@@ -42,6 +44,7 @@
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#include <asm/cacheflush.h>
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#include <asm/cachetype.h>
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#include <asm/tlbflush.h>
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#include <asm/system.h>
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#include <asm/prom.h>
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#include <asm/mach/arch.h>
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@@ -115,6 +118,13 @@ struct outer_cache_fns outer_cache __read_mostly;
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EXPORT_SYMBOL(outer_cache);
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#endif
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/*
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* Cached cpu_architecture() result for use by assembler code.
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* C code should use the cpu_architecture() function instead of accessing this
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* variable directly.
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*/
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int __cpu_architecture __read_mostly = CPU_ARCH_UNKNOWN;
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struct stack {
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u32 irq[3];
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u32 abt[3];
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@@ -210,7 +220,7 @@ static const char *proc_arch[] = {
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"?(17)",
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};
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int cpu_architecture(void)
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static int __get_cpu_architecture(void)
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{
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int cpu_arch;
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@@ -243,11 +253,22 @@ int cpu_architecture(void)
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return cpu_arch;
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}
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int __pure cpu_architecture(void)
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{
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BUG_ON(__cpu_architecture == CPU_ARCH_UNKNOWN);
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return __cpu_architecture;
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}
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static int cpu_has_aliasing_icache(unsigned int arch)
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{
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int aliasing_icache;
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unsigned int id_reg, num_sets, line_size;
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/* PIPT caches never alias. */
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if (icache_is_pipt())
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return 0;
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/* arch specifies the register format */
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switch (arch) {
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case CPU_ARCH_ARMv7:
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@@ -282,8 +303,14 @@ static void __init cacheid_init(void)
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/* ARMv7 register format */
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arch = CPU_ARCH_ARMv7;
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cacheid = CACHEID_VIPT_NONALIASING;
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if ((cachetype & (3 << 14)) == 1 << 14)
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switch (cachetype & (3 << 14)) {
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case (1 << 14):
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cacheid |= CACHEID_ASID_TAGGED;
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break;
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case (3 << 14):
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cacheid |= CACHEID_PIPT;
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break;
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}
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} else {
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arch = CPU_ARCH_ARMv6;
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if (cachetype & (1 << 23))
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@@ -300,10 +327,11 @@ static void __init cacheid_init(void)
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printk("CPU: %s data cache, %s instruction cache\n",
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cache_is_vivt() ? "VIVT" :
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cache_is_vipt_aliasing() ? "VIPT aliasing" :
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cache_is_vipt_nonaliasing() ? "VIPT nonaliasing" : "unknown",
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cache_is_vipt_nonaliasing() ? "PIPT / VIPT nonaliasing" : "unknown",
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cache_is_vivt() ? "VIVT" :
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icache_is_vivt_asid_tagged() ? "VIVT ASID tagged" :
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icache_is_vipt_aliasing() ? "VIPT aliasing" :
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icache_is_pipt() ? "PIPT" :
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cache_is_vipt_nonaliasing() ? "VIPT nonaliasing" : "unknown");
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}
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@@ -414,6 +442,7 @@ static void __init setup_processor(void)
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}
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cpu_name = list->cpu_name;
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__cpu_architecture = __get_cpu_architecture();
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#ifdef MULTI_CPU
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processor = *list->proc;
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@@ -861,7 +890,7 @@ static struct machine_desc * __init setup_machine_tags(unsigned int nr)
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}
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if (mdesc->fixup)
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mdesc->fixup(mdesc, tags, &from, &meminfo);
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mdesc->fixup(tags, &from, &meminfo);
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if (tags->hdr.tag == ATAG_CORE) {
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if (meminfo.nr_banks != 0)
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@@ -319,17 +319,7 @@ asmlinkage void __cpuinit secondary_start_kernel(void)
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*/
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platform_secondary_init(cpu);
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/*
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* Enable local interrupts.
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*/
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notify_cpu_starting(cpu);
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local_irq_enable();
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local_fiq_enable();
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/*
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* Setup the percpu timer for this CPU.
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*/
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percpu_timer_setup();
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calibrate_delay();
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@@ -341,9 +331,22 @@ asmlinkage void __cpuinit secondary_start_kernel(void)
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* before we continue.
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*/
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set_cpu_online(cpu, true);
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/*
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* Setup the percpu timer for this CPU.
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*/
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percpu_timer_setup();
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while (!cpu_active(cpu))
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cpu_relax();
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/*
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* cpu_active bit is set, so it's safe to enalbe interrupts
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* now.
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*/
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local_irq_enable();
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local_fiq_enable();
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/*
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* OK, it's off to the idle thread for us
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*/
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@@ -21,6 +21,7 @@
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#include <linux/kdebug.h>
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#include <linux/module.h>
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#include <linux/kexec.h>
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#include <linux/bug.h>
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#include <linux/delay.h>
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#include <linux/init.h>
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#include <linux/sched.h>
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@@ -271,6 +272,8 @@ void die(const char *str, struct pt_regs *regs, int err)
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spin_lock_irq(&die_lock);
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console_verbose();
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bust_spinlocks(1);
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if (!user_mode(regs))
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report_bug(regs->ARM_pc, regs);
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ret = __die(str, err, thread, regs);
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if (regs && kexec_should_crash(thread->task))
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@@ -302,6 +305,24 @@ void arm_notify_die(const char *str, struct pt_regs *regs,
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}
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}
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#ifdef CONFIG_GENERIC_BUG
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int is_valid_bugaddr(unsigned long pc)
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{
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#ifdef CONFIG_THUMB2_KERNEL
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unsigned short bkpt;
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#else
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unsigned long bkpt;
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#endif
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if (probe_kernel_address((unsigned *)pc, bkpt))
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return 0;
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return bkpt == BUG_INSTR_VALUE;
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}
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#endif
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static LIST_HEAD(undef_hook);
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static DEFINE_SPINLOCK(undef_lock);
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@@ -707,16 +728,6 @@ baddataabort(int code, unsigned long instr, struct pt_regs *regs)
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arm_notify_die("unknown data abort code", regs, &info, instr, 0);
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}
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void __attribute__((noreturn)) __bug(const char *file, int line)
|
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{
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printk(KERN_CRIT"kernel BUG at %s:%d!\n", file, line);
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*(int *)0 = 0;
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|
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/* Avoid "noreturn function does return" */
|
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for (;;);
|
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}
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EXPORT_SYMBOL(__bug);
|
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|
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void __readwrite_bug(const char *fn)
|
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{
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printk("%s called, but not implemented\n", fn);
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|
@@ -21,7 +21,8 @@
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#define ARM_CPU_KEEP(x)
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#endif
|
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|
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#if defined(CONFIG_SMP_ON_UP) && !defined(CONFIG_DEBUG_SPINLOCK)
|
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#if (defined(CONFIG_SMP_ON_UP) && !defined(CONFIG_DEBUG_SPINLOCK)) || \
|
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defined(CONFIG_GENERIC_BUG)
|
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#define ARM_EXIT_KEEP(x) x
|
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#define ARM_EXIT_DISCARD(x)
|
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#else
|
||||
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