MIPS: PMC-Sierra Yosemite: Remove support.
Nobody seems to be interested anymore and upstream also never had an ethernet driver. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
此提交包含在：
Ralf Baechle
@@ -34,8 +34,6 @@ obj-$(CONFIG_MIPS_MALTA) += fixup-malta.o
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obj-$(CONFIG_PMC_MSP7120_GW) += fixup-pmcmsp.o ops-pmcmsp.o
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obj-$(CONFIG_PMC_MSP7120_EVAL) += fixup-pmcmsp.o ops-pmcmsp.o
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obj-$(CONFIG_PMC_MSP7120_FPGA) += fixup-pmcmsp.o ops-pmcmsp.o
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obj-$(CONFIG_PMC_YOSEMITE) += fixup-yosemite.o ops-titan.o ops-titan-ht.o \
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pci-yosemite.o
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obj-$(CONFIG_SGI_IP27) += ops-bridge.o pci-ip27.o
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obj-$(CONFIG_SGI_IP32) += fixup-ip32.o ops-mace.o pci-ip32.o
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obj-$(CONFIG_SIBYTE_SB1250) += fixup-sb1250.o pci-sb1250.o
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@@ -1,41 +0,0 @@
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/*
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* Copyright 2003 PMC-Sierra
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* Author: Manish Lachwani (lachwani@pmc-sierra.com)
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
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* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
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* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/pci.h>
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int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
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{
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if (pin == 0)
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return -1;
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return 3; /* Everything goes to one irq bit */
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}
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/* Do platform specific device initialization at pci_enable_device() time */
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int pcibios_plat_dev_init(struct pci_dev *dev)
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{
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return 0;
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}
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@@ -1,124 +0,0 @@
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/*
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* Copyright 2003 PMC-Sierra
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* Author: Manish Lachwani (lachwani@pmc-sierra.com)
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
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* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
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* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <linux/types.h>
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#include <linux/pci.h>
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#include <linux/kernel.h>
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#include <linux/delay.h>
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#include <asm/io.h>
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#include <asm/titan_dep.h>
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static int titan_ht_config_read_dword(struct pci_bus *bus, unsigned int devfn,
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int offset, u32 *val)
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{
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volatile uint32_t address;
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int busno;
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busno = bus->number;
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address = (busno << 16) | (devfn << 8) | (offset & 0xfc) | 0x80000000;
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if (busno != 0)
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address |= 1;
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/*
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* RM9000 HT Errata: Issue back to back HT config
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* transcations. Issue a BIU sync before and
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* after the HT cycle
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*/
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*(volatile int32_t *) 0xfb0000f0 |= 0x2;
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udelay(30);
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*(volatile int32_t *) 0xfb0006f8 = address;
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*(val) = *(volatile int32_t *) 0xfb0006fc;
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udelay(30);
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* (volatile int32_t *) 0xfb0000f0 |= 0x2;
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return PCIBIOS_SUCCESSFUL;
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}
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static int titan_ht_config_read(struct pci_bus *bus, unsigned int devfn,
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int offset, int size, u32 *val)
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{
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uint32_t dword;
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titan_ht_config_read_dword(bus, devfn, offset, &dword);
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dword >>= ((offset & 3) << 3);
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dword &= (0xffffffffU >> ((4 - size) << 8));
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return PCIBIOS_SUCCESSFUL;
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}
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static inline int titan_ht_config_write_dword(struct pci_bus *bus,
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unsigned int devfn, int offset, u32 val)
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{
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volatile uint32_t address;
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int busno;
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busno = bus->number;
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address = (busno << 16) | (devfn << 8) | (offset & 0xfc) | 0x80000000;
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if (busno != 0)
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address |= 1;
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*(volatile int32_t *) 0xfb0000f0 |= 0x2;
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udelay(30);
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*(volatile int32_t *) 0xfb0006f8 = address;
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*(volatile int32_t *) 0xfb0006fc = val;
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udelay(30);
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*(volatile int32_t *) 0xfb0000f0 |= 0x2;
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return PCIBIOS_SUCCESSFUL;
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}
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static int titan_ht_config_write(struct pci_bus *bus, unsigned int devfn,
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int offset, int size, u32 val)
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{
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uint32_t val1, val2, mask;
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titan_ht_config_read_dword(bus, devfn, offset, &val2);
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val1 = val << ((offset & 3) << 3);
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mask = ~(0xffffffffU >> ((4 - size) << 8));
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val2 &= ~(mask << ((offset & 3) << 8));
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titan_ht_config_write_dword(bus, devfn, offset, val1 | val2);
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return PCIBIOS_SUCCESSFUL;
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}
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struct pci_ops titan_ht_pci_ops = {
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.read = titan_ht_config_read,
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.write = titan_ht_config_write,
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};
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@@ -1,111 +0,0 @@
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/*
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* Copyright 2003 PMC-Sierra
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* Author: Manish Lachwani (lachwani@pmc-sierra.com)
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
|
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* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
|
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
|
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
|
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* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
|
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <linux/types.h>
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#include <linux/pci.h>
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#include <linux/kernel.h>
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#include <asm/pci.h>
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#include <asm/io.h>
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#include <asm/rm9k-ocd.h>
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/*
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* PCI specific defines
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*/
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#define TITAN_PCI_0_CONFIG_ADDRESS 0x780
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#define TITAN_PCI_0_CONFIG_DATA 0x784
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/*
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* Titan PCI Config Read Byte
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*/
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static int titan_read_config(struct pci_bus *bus, unsigned int devfn, int reg,
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int size, u32 * val)
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{
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uint32_t address, tmp;
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int dev, busno, func;
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busno = bus->number;
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dev = PCI_SLOT(devfn);
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func = PCI_FUNC(devfn);
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address = (busno << 16) | (dev << 11) | (func << 8) |
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(reg & 0xfc) | 0x80000000;
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/* start the configuration cycle */
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ocd_writel(address, TITAN_PCI_0_CONFIG_ADDRESS);
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tmp = ocd_readl(TITAN_PCI_0_CONFIG_DATA) >> ((reg & 3) << 3);
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switch (size) {
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case 1:
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tmp &= 0xff;
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case 2:
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tmp &= 0xffff;
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}
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*val = tmp;
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return PCIBIOS_SUCCESSFUL;
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}
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static int titan_write_config(struct pci_bus *bus, unsigned int devfn, int reg,
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int size, u32 val)
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{
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uint32_t address;
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int dev, busno, func;
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busno = bus->number;
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dev = PCI_SLOT(devfn);
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func = PCI_FUNC(devfn);
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address = (busno << 16) | (dev << 11) | (func << 8) |
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(reg & 0xfc) | 0x80000000;
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/* start the configuration cycle */
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ocd_writel(address, TITAN_PCI_0_CONFIG_ADDRESS);
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/* write the data */
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switch (size) {
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case 1:
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ocd_writeb(val, TITAN_PCI_0_CONFIG_DATA + (~reg & 0x3));
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break;
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case 2:
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ocd_writew(val, TITAN_PCI_0_CONFIG_DATA + (~reg & 0x2));
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break;
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case 4:
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ocd_writel(val, TITAN_PCI_0_CONFIG_DATA);
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break;
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}
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return PCIBIOS_SUCCESSFUL;
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}
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/*
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* Titan PCI structure
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*/
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struct pci_ops titan_pci_ops = {
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titan_read_config,
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titan_write_config,
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};
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@@ -1,67 +0,0 @@
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/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org)
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*/
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/pci.h>
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#include <asm/titan_dep.h>
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extern struct pci_ops titan_pci_ops;
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static struct resource py_mem_resource = {
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.start = 0xe0000000UL,
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.end = 0xe3ffffffUL,
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.name = "Titan PCI MEM",
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.flags = IORESOURCE_MEM
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};
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/*
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* PMON really reserves 16MB of I/O port space but that's stupid, nothing
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* needs that much since allocations are limited to 256 bytes per device
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* anyway. So we just claim 64kB here.
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*/
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#define TITAN_IO_SIZE 0x0000ffffUL
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#define TITAN_IO_BASE 0xe8000000UL
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static struct resource py_io_resource = {
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.start = 0x00001000UL,
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.end = TITAN_IO_SIZE - 1,
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.name = "Titan IO MEM",
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.flags = IORESOURCE_IO,
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};
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static struct pci_controller py_controller = {
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.pci_ops = &titan_pci_ops,
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.mem_resource = &py_mem_resource,
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.mem_offset = 0x00000000UL,
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.io_resource = &py_io_resource,
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.io_offset = 0x00000000UL
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};
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static char ioremap_failed[] __initdata = "Could not ioremap I/O port range";
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static int __init pmc_yosemite_setup(void)
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{
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unsigned long io_v_base;
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io_v_base = (unsigned long) ioremap(TITAN_IO_BASE, TITAN_IO_SIZE);
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if (!io_v_base)
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panic(ioremap_failed);
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set_io_port_base(io_v_base);
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py_controller.io_map_base = io_v_base;
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TITAN_WRITE(RM9000x2_OCD_LKM7, TITAN_READ(RM9000x2_OCD_LKM7) | 1);
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ioport_resource.end = TITAN_IO_SIZE - 1;
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register_pci_controller(&py_controller);
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return 0;
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}
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arch_initcall(pmc_yosemite_setup);
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