iw_cxgb4/cxgb4/cxgb4vf/cxgb4i/csiostor: Cleanup register defines/macros related to all other cpl messages
This patch cleanups all other macros/register define related to CPL messages that are defined in t4_msg.h and the affected files Signed-off-by: Anish Bhatt <anish@chelsio.com> Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:

committed by
David S. Miller

부모
6c53e938a8
커밋
bdc590b99f
@@ -3501,19 +3501,19 @@ static void build_cpl_pass_accept_req(struct sk_buff *skb, int stid , u8 tos)
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req = (struct cpl_pass_accept_req *)__skb_push(skb, sizeof(*req));
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memset(req, 0, sizeof(*req));
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req->l2info = cpu_to_be16(V_SYN_INTF(intf) |
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V_SYN_MAC_IDX(G_RX_MACIDX(
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V_SYN_MAC_IDX(RX_MACIDX_G(
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(__force int) htonl(l2info))) |
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F_SYN_XACT_MATCH);
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eth_hdr_len = is_t4(dev->rdev.lldi.adapter_type) ?
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G_RX_ETHHDR_LEN((__force int) htonl(l2info)) :
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G_RX_T5_ETHHDR_LEN((__force int) htonl(l2info));
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req->hdr_len = cpu_to_be32(V_SYN_RX_CHAN(G_RX_CHAN(
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RX_ETHHDR_LEN_G((__force int)htonl(l2info)) :
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RX_T5_ETHHDR_LEN_G((__force int)htonl(l2info));
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req->hdr_len = cpu_to_be32(V_SYN_RX_CHAN(RX_CHAN_G(
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(__force int) htonl(l2info))) |
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V_TCP_HDR_LEN(G_RX_TCPHDR_LEN(
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V_TCP_HDR_LEN(RX_TCPHDR_LEN_G(
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(__force int) htons(hdr_len))) |
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V_IP_HDR_LEN(G_RX_IPHDR_LEN(
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V_IP_HDR_LEN(RX_IPHDR_LEN_G(
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(__force int) htons(hdr_len))) |
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V_ETH_HDR_LEN(G_RX_ETHHDR_LEN(eth_hdr_len)));
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V_ETH_HDR_LEN(RX_ETHHDR_LEN_G(eth_hdr_len)));
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req->vlan = (__force __be16) vlantag;
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req->len = (__force __be16) len;
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req->tos_stid = cpu_to_be32(PASS_OPEN_TID_V(stid) |
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@@ -3613,7 +3613,7 @@ static int rx_pkt(struct c4iw_dev *dev, struct sk_buff *skb)
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struct neighbour *neigh;
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/* Drop all non-SYN packets */
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if (!(cpl->l2info & cpu_to_be32(F_RXF_SYN)))
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if (!(cpl->l2info & cpu_to_be32(RXF_SYN_F)))
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goto reject;
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/*
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@@ -3635,8 +3635,8 @@ static int rx_pkt(struct c4iw_dev *dev, struct sk_buff *skb)
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}
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eth_hdr_len = is_t4(dev->rdev.lldi.adapter_type) ?
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G_RX_ETHHDR_LEN(htonl(cpl->l2info)) :
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G_RX_T5_ETHHDR_LEN(htonl(cpl->l2info));
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RX_ETHHDR_LEN_G(htonl(cpl->l2info)) :
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RX_T5_ETHHDR_LEN_G(htonl(cpl->l2info));
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if (eth_hdr_len == ETH_HLEN) {
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eh = (struct ethhdr *)(req + 1);
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iph = (struct iphdr *)(eh + 1);
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@@ -86,14 +86,14 @@ static int _c4iw_write_mem_dma_aligned(struct c4iw_rdev *rdev, u32 addr,
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req->wr.wr_lo = wait ? (__force __be64)(unsigned long) &wr_wait : 0L;
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req->wr.wr_mid = cpu_to_be32(FW_WR_LEN16_V(DIV_ROUND_UP(wr_len, 16)));
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req->cmd = cpu_to_be32(ULPTX_CMD_V(ULP_TX_MEM_WRITE));
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req->cmd |= cpu_to_be32(V_T5_ULP_MEMIO_ORDER(1));
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req->cmd |= cpu_to_be32(T5_ULP_MEMIO_ORDER_V(1));
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req->dlen = cpu_to_be32(ULP_MEMIO_DATA_LEN_V(len>>5));
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req->len16 = cpu_to_be32(DIV_ROUND_UP(wr_len-sizeof(req->wr), 16));
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req->lock_addr = cpu_to_be32(ULP_MEMIO_ADDR_V(addr));
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sgl = (struct ulptx_sgl *)(req + 1);
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sgl->cmd_nsge = cpu_to_be32(ULPTX_CMD_V(ULP_TX_SC_DSGL) |
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ULPTX_NSGE(1));
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ULPTX_NSGE_V(1));
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sgl->len0 = cpu_to_be32(len);
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sgl->addr0 = cpu_to_be64(data);
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