ethtool: provide UAPI for PHY master/slave configuration.
This UAPI is needed for BroadR-Reach 100BASE-T1 devices. Due to lack of auto-negotiation support, we needed to be able to configure the MASTER-SLAVE role of the port manually or from an application in user space. The same UAPI can be used for 1000BASE-T or MultiGBASE-T devices to force MASTER or SLAVE role. See IEEE 802.3-2018: 22.2.4.3.7 MASTER-SLAVE control register (Register 9) 22.2.4.3.8 MASTER-SLAVE status register (Register 10) 40.5.2 MASTER-SLAVE configuration resolution 45.2.1.185.1 MASTER-SLAVE config value (1.2100.14) 45.2.7.10 MultiGBASE-T AN control 1 register (Register 7.32) The MASTER-SLAVE role affects the clock configuration: ------------------------------------------------------------------------------- When the PHY is configured as MASTER, the PMA Transmit function shall source TX_TCLK from a local clock source. When configured as SLAVE, the PMA Transmit function shall source TX_TCLK from the clock recovered from data stream provided by MASTER. iMX6Q KSZ9031 XXX ------\ /-----------\ /------------\ | | | | | MAC |<----RGMII----->| PHY Slave |<------>| PHY Master | |<--- 125 MHz ---+-<------/ | | \ | ------/ \-----------/ \------------/ ^ \-TX_TCLK ------------------------------------------------------------------------------- Since some clock or link related issues are only reproducible in a specific MASTER-SLAVE-role, MAC and PHY configuration, it is beneficial to provide generic (not 100BASE-T1 specific) interface to the user space for configuration flexibility and trouble shooting. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
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committed by
David S. Miller

parent
3d59a5837c
commit
bdbdac7649
@@ -1666,6 +1666,18 @@ static inline int ethtool_validate_duplex(__u8 duplex)
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return 0;
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}
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#define MASTER_SLAVE_CFG_UNSUPPORTED 0
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#define MASTER_SLAVE_CFG_UNKNOWN 1
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#define MASTER_SLAVE_CFG_MASTER_PREFERRED 2
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#define MASTER_SLAVE_CFG_SLAVE_PREFERRED 3
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#define MASTER_SLAVE_CFG_MASTER_FORCE 4
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#define MASTER_SLAVE_CFG_SLAVE_FORCE 5
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#define MASTER_SLAVE_STATE_UNSUPPORTED 0
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#define MASTER_SLAVE_STATE_UNKNOWN 1
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#define MASTER_SLAVE_STATE_MASTER 2
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#define MASTER_SLAVE_STATE_SLAVE 3
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#define MASTER_SLAVE_STATE_ERR 4
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/* Which connector port. */
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#define PORT_TP 0x00
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#define PORT_AUI 0x01
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@@ -1904,7 +1916,9 @@ struct ethtool_link_settings {
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__u8 eth_tp_mdix_ctrl;
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__s8 link_mode_masks_nwords;
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__u8 transceiver;
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__u8 reserved1[3];
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__u8 master_slave_cfg;
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__u8 master_slave_state;
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__u8 reserved1[1];
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__u32 reserved[7];
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__u32 link_mode_masks[0];
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/* layout of link_mode_masks fields:
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