scsi: lpfc: Adjust default value of lpfc_nvmet_mrq
The current default for async hw receive queues is 1, which presents issues under heavy load as number of queues influence the available async receive buffer limits. Raise the default to the either the current hw limit (16) or the number of hw qs configured (io channel value). Revise the attribute definition for mrq to better reflect what we do for hw queues. E.g. 0 means default to optimal (# of cpus), non-zero specifies a specific limit. Before this change, mrq=0 meant target mode was disabled. As 0 now has a different meaning, rework the if tests to use the better nvmet_support check. Signed-off-by: Dick Kennedy <dick.kennedy@broadcom.com> Signed-off-by: James Smart <james.smart@broadcom.com> Reviewed-by: Hannes Reinecke <hare@suse.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
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Martin K. Petersen

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07d494f753
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bcb24f6577
@@ -25,6 +25,10 @@
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#define LPFC_NVMET_RQE_DEF_COUNT 512
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#define LPFC_NVMET_SUCCESS_LEN 12
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#define LPFC_NVMET_MRQ_OFF 0xffff
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#define LPFC_NVMET_MRQ_AUTO 0
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#define LPFC_NVMET_MRQ_MAX 16
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/* Used for NVME Target */
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struct lpfc_nvmet_tgtport {
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struct lpfc_hba *phba;
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