scsi: lpfc: Adjust default value of lpfc_nvmet_mrq
The current default for async hw receive queues is 1, which presents issues under heavy load as number of queues influence the available async receive buffer limits. Raise the default to the either the current hw limit (16) or the number of hw qs configured (io channel value). Revise the attribute definition for mrq to better reflect what we do for hw queues. E.g. 0 means default to optimal (# of cpus), non-zero specifies a specific limit. Before this change, mrq=0 meant target mode was disabled. As 0 now has a different meaning, rework the if tests to use the better nvmet_support check. Signed-off-by: Dick Kennedy <dick.kennedy@broadcom.com> Signed-off-by: James Smart <james.smart@broadcom.com> Reviewed-by: Hannes Reinecke <hare@suse.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
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Martin K. Petersen

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07d494f753
commit
bcb24f6577
@@ -3213,7 +3213,7 @@ lpfc_idiag_cqs_for_eq(struct lpfc_hba *phba, char *pbuffer,
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return 1;
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}
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if (eqidx < phba->cfg_nvmet_mrq) {
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if ((eqidx < phba->cfg_nvmet_mrq) && phba->nvmet_support) {
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/* NVMET CQset */
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qp = phba->sli4_hba.nvmet_cqset[eqidx];
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*len = __lpfc_idiag_print_cq(qp, "NVMET CQset", pbuffer, *len);
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