drm/amdgpu/gfx10: enlarge CP_MEC_DOORBELL_RANGE_UPPER to cover full doorbell.
commit 1c0b0efd148d5b24c4932ddb3fa03c8edd6097b3 upstream. If GC has entered CGPG, ringing doorbell > first page doesn't wakeup GC. Enlarge CP_MEC_DOORBELL_RANGE_UPPER to workaround this issue. Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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committed by
Greg Kroah-Hartman

parent
96b4126f8c
commit
bc58ec307c
@@ -6590,8 +6590,12 @@ static int gfx_v10_0_kiq_init_register(struct amdgpu_ring *ring)
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if (ring->use_doorbell) {
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if (ring->use_doorbell) {
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WREG32_SOC15(GC, 0, mmCP_MEC_DOORBELL_RANGE_LOWER,
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WREG32_SOC15(GC, 0, mmCP_MEC_DOORBELL_RANGE_LOWER,
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(adev->doorbell_index.kiq * 2) << 2);
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(adev->doorbell_index.kiq * 2) << 2);
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/* If GC has entered CGPG, ringing doorbell > first page doesn't
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* wakeup GC. Enlarge CP_MEC_DOORBELL_RANGE_UPPER to workaround
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* this issue.
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*/
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WREG32_SOC15(GC, 0, mmCP_MEC_DOORBELL_RANGE_UPPER,
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WREG32_SOC15(GC, 0, mmCP_MEC_DOORBELL_RANGE_UPPER,
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(adev->doorbell_index.userqueue_end * 2) << 2);
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(adev->doorbell.size - 4));
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}
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}
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WREG32_SOC15(GC, 0, mmCP_HQD_PQ_DOORBELL_CONTROL,
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WREG32_SOC15(GC, 0, mmCP_HQD_PQ_DOORBELL_CONTROL,
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