ARM: OMAP2+: nand: header cleanup
For common arm zImage existing nand header file in platform specific location was moved to generic platform data location, but it contained more than platform data, remove it. New local header has been created for exposing functions. Also move gpmc-nand platform data to platform header meant for nand from gpmc header file Signed-off-by: Afzal Mohammed <afzal@ti.com>
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@@ -11,6 +11,8 @@
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#ifndef __OMAP2_GPMC_H
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#define __OMAP2_GPMC_H
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#include <linux/platform_data/mtd-nand-omap2.h>
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/* Maximum Number of Chip Selects */
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#define GPMC_CS_NUM 8
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@@ -86,16 +88,6 @@
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#define PREFETCH_FIFOTHRESHOLD_MAX 0x40
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#define PREFETCH_FIFOTHRESHOLD(val) ((val) << 8)
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enum omap_ecc {
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/* 1-bit ecc: stored at end of spare area */
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OMAP_ECC_HAMMING_CODE_DEFAULT = 0, /* Default, s/w method */
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OMAP_ECC_HAMMING_CODE_HW, /* gpmc to detect the error */
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/* 1-bit ecc: stored at beginning of spare area as romcode */
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OMAP_ECC_HAMMING_CODE_HW_ROMCODE, /* gpmc method & romcode layout */
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OMAP_ECC_BCH4_CODE_HW, /* 4-bit BCH ecc code */
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OMAP_ECC_BCH8_CODE_HW, /* 8-bit BCH ecc code */
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};
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/*
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* Note that all values in this struct are in nanoseconds except sync_clk
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* (which is in picoseconds), while the register values are in gpmc_fck cycles.
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@@ -133,22 +125,6 @@ struct gpmc_timings {
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u16 wr_data_mux_bus; /* WRDATAONADMUXBUS */
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};
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struct gpmc_nand_regs {
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void __iomem *gpmc_status;
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void __iomem *gpmc_nand_command;
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void __iomem *gpmc_nand_address;
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void __iomem *gpmc_nand_data;
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void __iomem *gpmc_prefetch_config1;
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void __iomem *gpmc_prefetch_config2;
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void __iomem *gpmc_prefetch_control;
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void __iomem *gpmc_prefetch_status;
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void __iomem *gpmc_ecc_config;
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void __iomem *gpmc_ecc_control;
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void __iomem *gpmc_ecc_size_config;
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void __iomem *gpmc_ecc1_result;
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void __iomem *gpmc_bch_result0;
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};
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extern void gpmc_update_nand_reg(struct gpmc_nand_regs *reg, int cs);
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extern int gpmc_get_client_irq(unsigned irq_config);
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