Merge branch 'i2c/for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux

Pull more i2c updates from Wolfram Sang:
 "I2C has two more new drivers: Altera FPGA and STM32F7"

* 'i2c/for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux:
  i2c: i2c-stm32f7: add driver
  i2c: i2c-stm32f4: use generic definition of speed enum
  dt-bindings: i2c-stm32: Document the STM32F7 I2C bindings
  i2c: altera: Add Altera I2C Controller driver
  dt-bindings: i2c: Add Altera I2C Controller
This commit is contained in:
Linus Torvalds
2017-09-15 17:49:46 -07:00
9 changed files with 1602 additions and 14 deletions

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@@ -0,0 +1,39 @@
* Altera I2C Controller
* This is Altera's synthesizable logic block I2C Controller for use
* in Altera's FPGAs.
Required properties :
- compatible : should be "altr,softip-i2c-v1.0"
- reg : Offset and length of the register set for the device
- interrupts : <IRQ> where IRQ is the interrupt number.
- clocks : phandle to input clock.
- #address-cells = <1>;
- #size-cells = <0>;
Recommended properties :
- clock-frequency : desired I2C bus clock frequency in Hz.
Optional properties :
- fifo-size : Size of the RX and TX FIFOs in bytes.
- Child nodes conforming to i2c bus binding
Example :
i2c@100080000 {
compatible = "altr,softip-i2c-v1.0";
reg = <0x00000001 0x00080000 0x00000040>;
interrupt-parent = <&intc>;
interrupts = <0 43 4>;
clocks = <&clk_0>;
clock-frequency = <100000>;
#address-cells = <1>;
#size-cells = <0>;
fifo-size = <4>;
eeprom@51 {
compatible = "atmel,24c32";
reg = <0x51>;
pagesize = <32>;
};
};

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@@ -1,7 +1,9 @@
* I2C controller embedded in STMicroelectronics STM32 I2C platform
Required properties :
- compatible : Must be "st,stm32f4-i2c"
- compatible : Must be one of the following
- "st,stm32f4-i2c"
- "st,stm32f7-i2c"
- reg : Offset and length of the register set for the device
- interrupts : Must contain the interrupt id for I2C event and then the
interrupt id for I2C error.
@@ -14,8 +16,16 @@ Required properties :
Optional properties :
- clock-frequency : Desired I2C bus clock frequency in Hz. If not specified,
the default 100 kHz frequency will be used. As only Normal and Fast modes
are supported, possible values are 100000 and 400000.
the default 100 kHz frequency will be used.
For STM32F4 SoC Standard-mode and Fast-mode are supported, possible values are
100000 and 400000.
For STM32F7 SoC, Standard-mode, Fast-mode and Fast-mode Plus are supported,
possible values are 100000, 400000 and 1000000.
- i2c-scl-rising-time-ns : Only for STM32F7, I2C SCL Rising time for the board
(default: 25)
- i2c-scl-falling-time-ns : Only for STM32F7, I2C SCL Falling time for the board
(default: 10)
I2C Timings are derived from these 2 values
Example :
@@ -31,3 +41,16 @@ Example :
pinctrl-0 = <&i2c1_sda_pin>, <&i2c1_scl_pin>;
pinctrl-names = "default";
};
i2c@40005400 {
compatible = "st,stm32f7-i2c";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40005400 0x400>;
interrupts = <31>,
<32>;
resets = <&rcc STM32F7_APB1_RESET(I2C1)>;
clocks = <&rcc 1 CLK_I2C1>;
pinctrl-0 = <&i2c1_sda_pin>, <&i2c1_scl_pin>;
pinctrl-names = "default";
};