x86, um: ... and asm-x86 move
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
This commit is contained in:
Al Viro
265
arch/x86/include/asm/rwsem.h
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265
arch/x86/include/asm/rwsem.h
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/* rwsem.h: R/W semaphores implemented using XADD/CMPXCHG for i486+
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*
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* Written by David Howells (dhowells@redhat.com).
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*
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* Derived from asm-x86/semaphore.h
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*
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*
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* The MSW of the count is the negated number of active writers and waiting
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* lockers, and the LSW is the total number of active locks
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*
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* The lock count is initialized to 0 (no active and no waiting lockers).
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*
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* When a writer subtracts WRITE_BIAS, it'll get 0xffff0001 for the case of an
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* uncontended lock. This can be determined because XADD returns the old value.
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* Readers increment by 1 and see a positive value when uncontended, negative
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* if there are writers (and maybe) readers waiting (in which case it goes to
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* sleep).
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*
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* The value of WAITING_BIAS supports up to 32766 waiting processes. This can
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* be extended to 65534 by manually checking the whole MSW rather than relying
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* on the S flag.
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*
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* The value of ACTIVE_BIAS supports up to 65535 active processes.
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*
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* This should be totally fair - if anything is waiting, a process that wants a
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* lock will go to the back of the queue. When the currently active lock is
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* released, if there's a writer at the front of the queue, then that and only
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* that will be woken up; if there's a bunch of consequtive readers at the
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* front, then they'll all be woken up, but no other readers will be.
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*/
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#ifndef ASM_X86__RWSEM_H
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#define ASM_X86__RWSEM_H
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#ifndef _LINUX_RWSEM_H
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#error "please don't include asm/rwsem.h directly, use linux/rwsem.h instead"
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#endif
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#ifdef __KERNEL__
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#include <linux/list.h>
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#include <linux/spinlock.h>
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#include <linux/lockdep.h>
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struct rwsem_waiter;
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extern asmregparm struct rw_semaphore *
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rwsem_down_read_failed(struct rw_semaphore *sem);
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extern asmregparm struct rw_semaphore *
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rwsem_down_write_failed(struct rw_semaphore *sem);
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extern asmregparm struct rw_semaphore *
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rwsem_wake(struct rw_semaphore *);
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extern asmregparm struct rw_semaphore *
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rwsem_downgrade_wake(struct rw_semaphore *sem);
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/*
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* the semaphore definition
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*/
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#define RWSEM_UNLOCKED_VALUE 0x00000000
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#define RWSEM_ACTIVE_BIAS 0x00000001
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#define RWSEM_ACTIVE_MASK 0x0000ffff
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#define RWSEM_WAITING_BIAS (-0x00010000)
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#define RWSEM_ACTIVE_READ_BIAS RWSEM_ACTIVE_BIAS
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#define RWSEM_ACTIVE_WRITE_BIAS (RWSEM_WAITING_BIAS + RWSEM_ACTIVE_BIAS)
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struct rw_semaphore {
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signed long count;
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spinlock_t wait_lock;
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struct list_head wait_list;
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#ifdef CONFIG_DEBUG_LOCK_ALLOC
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struct lockdep_map dep_map;
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#endif
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};
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#ifdef CONFIG_DEBUG_LOCK_ALLOC
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# define __RWSEM_DEP_MAP_INIT(lockname) , .dep_map = { .name = #lockname }
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#else
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# define __RWSEM_DEP_MAP_INIT(lockname)
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#endif
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#define __RWSEM_INITIALIZER(name) \
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{ \
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RWSEM_UNLOCKED_VALUE, __SPIN_LOCK_UNLOCKED((name).wait_lock), \
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LIST_HEAD_INIT((name).wait_list) __RWSEM_DEP_MAP_INIT(name) \
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}
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#define DECLARE_RWSEM(name) \
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struct rw_semaphore name = __RWSEM_INITIALIZER(name)
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extern void __init_rwsem(struct rw_semaphore *sem, const char *name,
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struct lock_class_key *key);
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#define init_rwsem(sem) \
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do { \
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static struct lock_class_key __key; \
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\
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__init_rwsem((sem), #sem, &__key); \
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} while (0)
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/*
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* lock for reading
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*/
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static inline void __down_read(struct rw_semaphore *sem)
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{
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asm volatile("# beginning down_read\n\t"
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LOCK_PREFIX " incl (%%eax)\n\t"
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/* adds 0x00000001, returns the old value */
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" jns 1f\n"
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" call call_rwsem_down_read_failed\n"
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"1:\n\t"
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"# ending down_read\n\t"
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: "+m" (sem->count)
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: "a" (sem)
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: "memory", "cc");
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}
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/*
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* trylock for reading -- returns 1 if successful, 0 if contention
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*/
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static inline int __down_read_trylock(struct rw_semaphore *sem)
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{
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__s32 result, tmp;
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asm volatile("# beginning __down_read_trylock\n\t"
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" movl %0,%1\n\t"
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"1:\n\t"
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" movl %1,%2\n\t"
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" addl %3,%2\n\t"
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" jle 2f\n\t"
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LOCK_PREFIX " cmpxchgl %2,%0\n\t"
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" jnz 1b\n\t"
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"2:\n\t"
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"# ending __down_read_trylock\n\t"
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: "+m" (sem->count), "=&a" (result), "=&r" (tmp)
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: "i" (RWSEM_ACTIVE_READ_BIAS)
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: "memory", "cc");
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return result >= 0 ? 1 : 0;
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}
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/*
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* lock for writing
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*/
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static inline void __down_write_nested(struct rw_semaphore *sem, int subclass)
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{
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int tmp;
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tmp = RWSEM_ACTIVE_WRITE_BIAS;
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asm volatile("# beginning down_write\n\t"
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LOCK_PREFIX " xadd %%edx,(%%eax)\n\t"
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/* subtract 0x0000ffff, returns the old value */
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" testl %%edx,%%edx\n\t"
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/* was the count 0 before? */
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" jz 1f\n"
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" call call_rwsem_down_write_failed\n"
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"1:\n"
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"# ending down_write"
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: "+m" (sem->count), "=d" (tmp)
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: "a" (sem), "1" (tmp)
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: "memory", "cc");
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}
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static inline void __down_write(struct rw_semaphore *sem)
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{
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__down_write_nested(sem, 0);
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}
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/*
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* trylock for writing -- returns 1 if successful, 0 if contention
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*/
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static inline int __down_write_trylock(struct rw_semaphore *sem)
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{
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signed long ret = cmpxchg(&sem->count,
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RWSEM_UNLOCKED_VALUE,
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RWSEM_ACTIVE_WRITE_BIAS);
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if (ret == RWSEM_UNLOCKED_VALUE)
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return 1;
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return 0;
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}
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/*
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* unlock after reading
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*/
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static inline void __up_read(struct rw_semaphore *sem)
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{
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__s32 tmp = -RWSEM_ACTIVE_READ_BIAS;
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asm volatile("# beginning __up_read\n\t"
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LOCK_PREFIX " xadd %%edx,(%%eax)\n\t"
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/* subtracts 1, returns the old value */
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" jns 1f\n\t"
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" call call_rwsem_wake\n"
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"1:\n"
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"# ending __up_read\n"
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: "+m" (sem->count), "=d" (tmp)
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: "a" (sem), "1" (tmp)
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: "memory", "cc");
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}
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/*
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* unlock after writing
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*/
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static inline void __up_write(struct rw_semaphore *sem)
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{
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asm volatile("# beginning __up_write\n\t"
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" movl %2,%%edx\n\t"
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LOCK_PREFIX " xaddl %%edx,(%%eax)\n\t"
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/* tries to transition
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0xffff0001 -> 0x00000000 */
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" jz 1f\n"
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" call call_rwsem_wake\n"
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"1:\n\t"
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"# ending __up_write\n"
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: "+m" (sem->count)
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: "a" (sem), "i" (-RWSEM_ACTIVE_WRITE_BIAS)
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: "memory", "cc", "edx");
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}
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/*
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* downgrade write lock to read lock
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*/
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static inline void __downgrade_write(struct rw_semaphore *sem)
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{
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asm volatile("# beginning __downgrade_write\n\t"
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LOCK_PREFIX " addl %2,(%%eax)\n\t"
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/* transitions 0xZZZZ0001 -> 0xYYYY0001 */
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" jns 1f\n\t"
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" call call_rwsem_downgrade_wake\n"
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"1:\n\t"
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"# ending __downgrade_write\n"
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: "+m" (sem->count)
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: "a" (sem), "i" (-RWSEM_WAITING_BIAS)
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: "memory", "cc");
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}
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/*
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* implement atomic add functionality
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*/
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static inline void rwsem_atomic_add(int delta, struct rw_semaphore *sem)
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{
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asm volatile(LOCK_PREFIX "addl %1,%0"
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: "+m" (sem->count)
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: "ir" (delta));
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}
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/*
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* implement exchange and add functionality
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*/
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static inline int rwsem_atomic_update(int delta, struct rw_semaphore *sem)
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{
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int tmp = delta;
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asm volatile(LOCK_PREFIX "xadd %0,%1"
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: "+r" (tmp), "+m" (sem->count)
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: : "memory");
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return tmp + delta;
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}
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static inline int rwsem_is_locked(struct rw_semaphore *sem)
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{
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return (sem->count != 0);
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}
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#endif /* __KERNEL__ */
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#endif /* ASM_X86__RWSEM_H */
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