ARM: EXYNOS: add interrupt definitions for EXYNOS5250
This patch adds the interrupt definitions for EXYNOS5250 at <mach/irqs.h> file and it is needed for EXYNOS5250 SoC. As a note, for single zImage of EXYNOS4 and EXYNOS5, prefix of EXYNOS4_ and EXYNOS5_ has been added. Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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@@ -19,6 +19,7 @@
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#include <linux/io.h>
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#include <mach/map.h>
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#include <plat/cpu.h>
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#include <plat/irq-vic-timer.h>
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#include <plat/regs-timer.h>
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@@ -57,6 +58,21 @@ void __init s3c_init_vic_timer_irq(unsigned int num, unsigned int timer_irq)
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struct irq_chip_type *ct;
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unsigned int i;
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#ifdef CONFIG_ARCH_EXYNOS
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if (soc_is_exynos5250()) {
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pirq[0] = EXYNOS5_IRQ_TIMER0_VIC;
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pirq[1] = EXYNOS5_IRQ_TIMER1_VIC;
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pirq[2] = EXYNOS5_IRQ_TIMER2_VIC;
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pirq[3] = EXYNOS5_IRQ_TIMER3_VIC;
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pirq[4] = EXYNOS5_IRQ_TIMER4_VIC;
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} else {
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pirq[0] = EXYNOS4_IRQ_TIMER0_VIC;
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pirq[1] = EXYNOS4_IRQ_TIMER1_VIC;
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pirq[2] = EXYNOS4_IRQ_TIMER2_VIC;
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pirq[3] = EXYNOS4_IRQ_TIMER3_VIC;
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pirq[4] = EXYNOS4_IRQ_TIMER4_VIC;
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}
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#endif
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s3c_tgc = irq_alloc_generic_chip("s3c-timer", 1, timer_irq,
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S3C64XX_TINT_CSTAT, handle_level_irq);
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