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e1000e: additional error handling on PHY register accesses

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PHY reads/writes via the MDIC register could potentially return results
from a previous PHY register access.  If that happens, the offset in the
returned results will be that of the previous access and if that is
different from the expected offset, log a debug message and error out.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Tested-by: Aaron Brown <aaron.f.brown@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
This commit is contained in:
Bruce Allan
2013-03-06 09:02:31 +00:00
committed by Jeff Kirsher
parent 8b49a4c759
commit bb034512da
2 changed files with 13 additions and 0 deletions
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drivers/net/ethernet/intel/e1000e/defines.h
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@@ -788,6 +788,7 @@
GG82563_REG(194, 18) /* Inband Control */
/* MDI Control */
#define E1000_MDIC_REG_MASK 0x001F0000
#define E1000_MDIC_REG_SHIFT 16
#define E1000_MDIC_PHY_SHIFT 21
#define E1000_MDIC_OP_WRITE 0x04000000