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drm/i915: Add initial bits for VGA modesetting bringup on Sandybridge.

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Signed-off-by: Eric Anholt <eric@anholt.net>
This commit is contained in:
Eric Anholt
2009-10-22 16:11:14 -07:00
parent 1089e30095
commit bad720ff3e
12 changed files with 88 additions and 56 deletions
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16
drivers/gpu/drm/i915/i915_dma.c
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@@ -1094,15 +1094,21 @@ static int i915_probe_agp(struct drm_device *dev, uint32_t *aperture_size,
* Some of the preallocated space is taken by the GTT
* and popup. GTT is 1K per MB of aperture size, and popup is 4K.
*/
if (IS_G4X(dev) || IS_PINEVIEW(dev) || IS_IRONLAKE(dev))
if (IS_G4X(dev) || IS_PINEVIEW(dev) || IS_IRONLAKE(dev) || IS_GEN6(dev))
overhead = 4096;
else
overhead = (*aperture_size / 1024) + 4096;
switch (tmp & INTEL_GMCH_GMS_MASK) {
case INTEL_855_GMCH_GMS_DISABLED:
DRM_ERROR("video memory is disabled\n");
return -1;
/* XXX: This is what my A1 silicon has. */
if (IS_GEN6(dev)) {
stolen = 64 * 1024 * 1024;
} else {
DRM_ERROR("video memory is disabled\n");
return -1;
}
break;
case INTEL_855_GMCH_GMS_STOLEN_1M:
stolen = 1 * 1024 * 1024;
break;
@@ -1180,7 +1186,7 @@ static unsigned long i915_gtt_to_phys(struct drm_device *dev,
int gtt_offset, gtt_size;
if (IS_I965G(dev)) {
if (IS_G4X(dev) || IS_IRONLAKE(dev)) {
if (IS_G4X(dev) || IS_IRONLAKE(dev) || IS_GEN6(dev)) {
gtt_offset = 2*1024*1024;
gtt_size = 2*1024*1024;
} else {
@@ -1563,7 +1569,7 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
dev->driver->get_vblank_counter = i915_get_vblank_counter;
dev->max_vblank_count = 0xffffff; /* only 24 bits of frame count */
if (IS_G4X(dev) || IS_IRONLAKE(dev)) {
if (IS_G4X(dev) || IS_IRONLAKE(dev) || IS_GEN6(dev)) {
dev->max_vblank_count = 0xffffffff; /* full 32 bit counter */
dev->driver->get_vblank_counter = gm45_get_vblank_counter;
}