Merge tag 'integrator-armsoc-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator into next/late
Pull "This is a bunch of Integrator changes for v4.9" Linus Walleij: - Add and fix a bunch of clocks in the DTS corresponding to the new clock support merged into the clk tree. - Move the CLCD display configuration from boardfile to device tree using the new CLCD support merged into the fbdev tree. - Cut some auxdata. - Cut some static remappings. - Move the sched_clock() counter to use syscon+regmap. * tag 'integrator-armsoc-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator: ARM: integrator: read counter using syscon/regmap ARM: integrator: cut down on static maps ARM: integrator: delete some auxdata ARM: integrator: move CP CLCD display to DTS ARM: dts: add the core module clocks to Integrator/CP ARM: dts: Add the core module clocks to Integrator/AP ARM: dts: add the Integrator/AP baseboard clocks ARM: dts: set the 24MHz xtal as parent of the UART clock
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@@ -19,7 +19,7 @@
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bootargs = "root=/dev/ram0 console=ttyAM0,38400n8 earlyprintk";
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};
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/* 24 MHz chrystal on the core module */
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/* 24 MHz chrystal on the Integrator/AP development board */
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xtal24mhz: xtal24mhz@24M {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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@@ -39,6 +39,34 @@
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <14745600>;
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clocks = <&xtal24mhz>;
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};
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core-module@10000000 {
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/* 24 MHz chrystal on the core module */
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cm24mhz: cm24mhz@24M {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <24000000>;
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};
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/* Oscillator on the core module, clocks the CPU core */
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cmosc: cmosc@24M {
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compatible = "arm,syscon-icst525-integratorap-cm";
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#clock-cells = <0>;
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lock-offset = <0x14>;
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vco-offset = <0x08>;
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clocks = <&cm24mhz>;
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};
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/* Auxilary oscillator on the core module, 32.369MHz at boot */
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auxosc: auxosc@24M {
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compatible = "arm,syscon-icst525";
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#clock-cells = <0>;
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lock-offset = <0x14>;
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vco-offset = <0x1c>;
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clocks = <&cm24mhz>;
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};
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};
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syscon {
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@@ -47,6 +75,27 @@
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interrupt-parent = <&pic>;
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/* These are the logical module IRQs */
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interrupts = <9>, <10>, <11>, <12>;
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/*
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* SYSCLK clocks PCIv3 bridge, system controller and the
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* logic modules.
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*/
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sysclk: apsys@24M {
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compatible = "arm,syscon-icst525-integratorap-sys";
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#clock-cells = <0>;
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lock-offset = <0x1c>;
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vco-offset = <0x04>;
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clocks = <&xtal24mhz>;
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};
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/* One-bit control for the PCI bus clock (33 or 25 MHz) */
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pciclk: pciclk@24M {
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compatible = "arm,syscon-icst525-integratorap-pci";
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#clock-cells = <0>;
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lock-offset = <0x1c>;
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vco-offset = <0x04>;
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clocks = <&xtal24mhz>;
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};
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};
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timer0: timer@13000000 {
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