Merge tag 'soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC-specific updates from Arnd Bergmann: "This is a larger set of new functionality for the existing SoC families, including: - vt8500 gains support for new CPU cores, notably the Cortex-A9 based wm8850 - prima2 gains support for the "marco" SoC family, its SMP based cousin - tegra gains support for the new Tegra4 (Tegra114) family - socfpga now supports a newer version of the hardware including SMP - i.mx31 and bcm2835 are now using DT probing for their clocks - lots of updates for sh-mobile - OMAP updates for clocks, power management and USB - i.mx6q and tegra now support cpuidle - kirkwood now supports PCIe hot plugging - tegra clock support is updated - tegra USB PHY probing gets implemented diffently" * tag 'soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (148 commits) ARM: prima2: remove duplicate v7_invalidate_l1 ARM: shmobile: r8a7779: Correct TMU clock support again ARM: prima2: fix __init section for cpu hotplug ARM: OMAP: Consolidate OMAP USB-HS platform data (part 3/3) ARM: OMAP: Consolidate OMAP USB-HS platform data (part 1/3) arm: socfpga: Add SMP support for actual socfpga harware arm: Add v7_invalidate_l1 to cache-v7.S arm: socfpga: Add entries to enable make dtbs socfpga arm: socfpga: Add new device tree source for actual socfpga HW ARM: tegra: sort Kconfig selects for Tegra114 ARM: tegra: enable ARCH_REQUIRE_GPIOLIB for Tegra114 ARM: tegra: Fix build error w/ ARCH_TEGRA_114_SOC w/o ARCH_TEGRA_3x_SOC ARM: tegra: Fix build error for gic update ARM: tegra: remove empty tegra_smp_init_cpus() ARM: shmobile: Register ARM architected timer ARM: MARCO: fix the build issue due to gic-vic-to-irqchip move ARM: shmobile: r8a7779: Correct TMU clock support ARM: mxs_defconfig: Select CONFIG_DEVTMPFS_MOUNT ARM: mxs: decrease mxs_clockevent_device.min_delta_ns to 2 clock cycles ARM: mxs: use apbx bus clock to drive the timers on timrotv2 ...
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@@ -32,8 +32,6 @@
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#include "pm.h"
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#include "twl-common.h"
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static struct omap_device_pm_latency *pm_lats;
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/*
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* omap_pm_suspend: points to a function that does the SoC-specific
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* suspend work
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@@ -82,7 +80,7 @@ static int __init _init_omap_device(char *name)
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__func__, name))
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return -ENODEV;
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pdev = omap_device_build(oh->name, 0, oh, NULL, 0, pm_lats, 0, false);
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pdev = omap_device_build(oh->name, 0, oh, NULL, 0);
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if (WARN(IS_ERR(pdev), "%s: could not build omap_device for %s\n",
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__func__, name))
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return -ENODEV;
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@@ -108,79 +106,18 @@ static void __init omap2_init_processor_devices(void)
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}
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}
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/* Types of sleep_switch used in omap_set_pwrdm_state */
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#define FORCEWAKEUP_SWITCH 0
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#define LOWPOWERSTATE_SWITCH 1
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int __init omap_pm_clkdms_setup(struct clockdomain *clkdm, void *unused)
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{
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/* XXX The usecount test is racy */
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if ((clkdm->flags & CLKDM_CAN_ENABLE_AUTO) &&
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!(clkdm->flags & CLKDM_MISSING_IDLE_REPORTING))
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clkdm_allow_idle(clkdm);
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else if (clkdm->flags & CLKDM_CAN_FORCE_SLEEP &&
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atomic_read(&clkdm->usecount) == 0)
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clkdm->usecount == 0)
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clkdm_sleep(clkdm);
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return 0;
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}
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/*
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* This sets pwrdm state (other than mpu & core. Currently only ON &
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* RET are supported.
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*/
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int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 pwrst)
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{
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u8 curr_pwrst, next_pwrst;
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int sleep_switch = -1, ret = 0, hwsup = 0;
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if (!pwrdm || IS_ERR(pwrdm))
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return -EINVAL;
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while (!(pwrdm->pwrsts & (1 << pwrst))) {
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if (pwrst == PWRDM_POWER_OFF)
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return ret;
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pwrst--;
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}
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next_pwrst = pwrdm_read_next_pwrst(pwrdm);
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if (next_pwrst == pwrst)
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return ret;
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curr_pwrst = pwrdm_read_pwrst(pwrdm);
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if (curr_pwrst < PWRDM_POWER_ON) {
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if ((curr_pwrst > pwrst) &&
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(pwrdm->flags & PWRDM_HAS_LOWPOWERSTATECHANGE)) {
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sleep_switch = LOWPOWERSTATE_SWITCH;
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} else {
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hwsup = clkdm_in_hwsup(pwrdm->pwrdm_clkdms[0]);
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clkdm_wakeup(pwrdm->pwrdm_clkdms[0]);
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sleep_switch = FORCEWAKEUP_SWITCH;
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}
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}
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ret = pwrdm_set_next_pwrst(pwrdm, pwrst);
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if (ret)
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pr_err("%s: unable to set power state of powerdomain: %s\n",
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__func__, pwrdm->name);
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switch (sleep_switch) {
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case FORCEWAKEUP_SWITCH:
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if (hwsup)
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clkdm_allow_idle(pwrdm->pwrdm_clkdms[0]);
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else
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clkdm_sleep(pwrdm->pwrdm_clkdms[0]);
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break;
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case LOWPOWERSTATE_SWITCH:
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pwrdm_set_lowpwrstchange(pwrdm);
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pwrdm_wait_transition(pwrdm);
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pwrdm_state_switch(pwrdm);
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break;
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}
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return ret;
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}
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/*
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* This API is to be called during init to set the various voltage
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* domains to the voltage as per the opp table. Typically we boot up
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