[POWERPC] Use the genirq framework
This adapts the generic powerpc interrupt handling code, and all of the platforms except for the embedded 6xx machines, to use the new genirq framework. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
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committed by
Paul Mackerras

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5a43a066b1
commit
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@@ -114,9 +114,6 @@
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#define MPIC_VEC_TIMER_1 248
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#define MPIC_VEC_TIMER_0 247
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/* Type definition of the cascade handler */
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typedef int (*mpic_cascade_t)(struct pt_regs *regs, void *data);
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#ifdef CONFIG_MPIC_BROKEN_U3
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/* Fixup table entry */
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struct mpic_irq_fixup
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@@ -133,9 +130,12 @@ struct mpic_irq_fixup
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struct mpic
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{
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/* The "linux" controller struct */
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hw_irq_controller hc_irq;
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struct irq_chip hc_irq;
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#ifdef CONFIG_MPIC_BROKEN_U3
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struct irq_chip hc_ht_irq;
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#endif
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#ifdef CONFIG_SMP
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hw_irq_controller hc_ipi;
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struct irq_chip hc_ipi;
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#endif
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const char *name;
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/* Flags */
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@@ -153,10 +153,6 @@ struct mpic
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unsigned int num_sources;
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/* Number of CPUs */
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unsigned int num_cpus;
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/* cascade handler */
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mpic_cascade_t cascade;
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void *cascade_data;
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unsigned int cascade_vec;
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/* senses array */
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unsigned char *senses;
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unsigned int senses_count;
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@@ -237,17 +233,6 @@ extern void mpic_assign_isu(struct mpic *mpic, unsigned int isu_num,
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*/
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extern void mpic_init(struct mpic *mpic);
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/* Setup a cascade. Currently, only one cascade is supported this
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* way, though you can always do a normal request_irq() and add
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* other cascades this way. You should call this _after_ having
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* added all the ISUs
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*
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* @irq_no: "linux" irq number of the cascade (that is offset'ed vector)
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* @handler: cascade handler function
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*/
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extern void mpic_setup_cascade(unsigned int irq_no, mpic_cascade_t hanlder,
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void *data);
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/*
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* All of the following functions must only be used after the
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* ISUs have been assigned and the controller fully initialized
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