ath10k: adjust the RX packet pad offset at QCA99X0 4addr mode
The QCA99X0 4 addresses RX packets pad 2 bytes at the beginning of MSDU instead the end of ieee80211 header to keep alignment. The currently RX data path can't parse the header correctly in this case. This patch fixes it for QCA99X0. Signed-off-by: Yanbo Li <yanbol@qca.qualcomm.com> [kvalo@qca.qualcomm.com: checkpatch fixes and naming changes] Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
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@@ -304,6 +304,11 @@ enum ath10k_hw_rate_cck {
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ATH10K_HW_RATE_CCK_SP_2M,
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};
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enum ath10k_hw_4addr_pad {
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ATH10K_HW_4ADDR_PAD_AFTER,
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ATH10K_HW_4ADDR_PAD_BEFORE,
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};
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/* Target specific defines for MAIN firmware */
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#define TARGET_NUM_VDEVS 8
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#define TARGET_NUM_PEER_AST 2
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