ath10k: adjust the RX packet pad offset at QCA99X0 4addr mode

The QCA99X0 4 addresses RX packets pad 2 bytes at the beginning of
MSDU instead the end of ieee80211 header to keep alignment. The currently RX
data path can't parse the header correctly in this case. This patch fixes it
for QCA99X0.

Signed-off-by: Yanbo Li <yanbol@qca.qualcomm.com>
[kvalo@qca.qualcomm.com: checkpatch fixes and naming changes]
Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
This commit is contained in:
Yanbo Li
2015-11-16 22:22:02 +02:00
committed by Kalle Valo
parent 9b1ba7b28e
commit b8d55fca9e
4 changed files with 27 additions and 1 deletions

View File

@@ -304,6 +304,11 @@ enum ath10k_hw_rate_cck {
ATH10K_HW_RATE_CCK_SP_2M,
};
enum ath10k_hw_4addr_pad {
ATH10K_HW_4ADDR_PAD_AFTER,
ATH10K_HW_4ADDR_PAD_BEFORE,
};
/* Target specific defines for MAIN firmware */
#define TARGET_NUM_VDEVS 8
#define TARGET_NUM_PEER_AST 2