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Merge tag 'clk-meson-dt-v5.4-3' of git://github.com/BayLibre/clk-meson into v5.4/dt64-2

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Amlogic clk dt bindings changes for v5.4 - 3rd round
 * add sm1 peripheral controller bindings
This commit is contained in:
Kevin Hilman
2019-08-29 16:12:46 -07:00
parent 77657b805b cda4569137
commit b8b1c9ad1c
4 changed files with 45 additions and 0 deletions
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5
include/dt-bindings/clock/g12a-clkc.h
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@@ -138,5 +138,10 @@
#define CLKID_VDEC_HEVCF 210
#define CLKID_TS 212
#define CLKID_CPUB_CLK 224
#define CLKID_GP1_PLL 243
#define CLKID_DSU_CLK 252
#define CLKID_CPU1_CLK 253
#define CLKID_CPU2_CLK 254
#define CLKID_CPU3_CLK 255
#endif /* __G12A_CLKC_H */

38
include/dt-bindings/reset/amlogic,meson-g12a-audio-reset.h Normal file
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@@ -0,0 +1,38 @@
/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (c) 2019 BayLibre, SAS.
* Author: Jerome Brunet <jbrunet@baylibre.com>
*
*/
#ifndef _DT_BINDINGS_AMLOGIC_MESON_G12A_AUDIO_RESET_H
#define _DT_BINDINGS_AMLOGIC_MESON_G12A_AUDIO_RESET_H
#define AUD_RESET_PDM 0
#define AUD_RESET_TDMIN_A 1
#define AUD_RESET_TDMIN_B 2
#define AUD_RESET_TDMIN_C 3
#define AUD_RESET_TDMIN_LB 4
#define AUD_RESET_LOOPBACK 5
#define AUD_RESET_TODDR_A 6
#define AUD_RESET_TODDR_B 7
#define AUD_RESET_TODDR_C 8
#define AUD_RESET_FRDDR_A 9
#define AUD_RESET_FRDDR_B 10
#define AUD_RESET_FRDDR_C 11
#define AUD_RESET_TDMOUT_A 12
#define AUD_RESET_TDMOUT_B 13
#define AUD_RESET_TDMOUT_C 14
#define AUD_RESET_SPDIFOUT 15
#define AUD_RESET_SPDIFOUT_B 16
#define AUD_RESET_SPDIFIN 17
#define AUD_RESET_EQDRC 18
#define AUD_RESET_RESAMPLE 19
#define AUD_RESET_DDRARB 20
#define AUD_RESET_POWDET 21
#define AUD_RESET_TORAM 22
#define AUD_RESET_TOACODEC 23
#define AUD_RESET_TOHDMITX 24
#define AUD_RESET_CLKTREE 25
#endif