Merge tag 'clk-meson-dt-v5.4-3' of git://github.com/BayLibre/clk-meson into v5.4/dt64-2
Amlogic clk dt bindings changes for v5.4 - 3rd round * add sm1 peripheral controller bindings
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@@ -22,6 +22,7 @@ Required Properties:
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components.
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- resets : phandle of the internal reset line
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- #clock-cells : should be 1.
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- #reset-cells : should be 1 on the g12a (and following) soc family
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Each clock is assigned an identifier and client nodes can use this identifier
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to specify the clock which they consume. All available clocks are defined as
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@@ -11,6 +11,7 @@ Required Properties:
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"amlogic,axg-clkc" for AXG SoC.
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"amlogic,g12a-clkc" for G12A SoC.
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"amlogic,g12b-clkc" for G12B SoC.
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"amlogic,sm1-clkc" for SM1 SoC.
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- clocks : list of clock phandle, one for each entry clock-names.
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- clock-names : should contain the following:
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* "xtal": the platform xtal
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