[media] m88rs2000: make use ts2020
Tuner part of Montage rs2000 chip is similar to ts2020 tuner. Patch to use ts2020 code. [mchehab@redhat.com: a few CodingStyle fixes] Signed-off-by: Igor M. Liplianin <liplianin@me.by> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
This commit is contained in:
Igor M. Liplianin
committed by
Mauro Carvalho Chehab
Mauro Carvalho Chehab
parent
43385c8a64
commit
b858c331cd
@@ -23,27 +23,68 @@
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#include "ts2020.h"
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#define TS2020_XTAL_FREQ 27000 /* in kHz */
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#define FREQ_OFFSET_LOW_SYM_RATE 3000
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struct ts2020_state {
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u8 tuner_address;
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struct ts2020_priv {
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/* i2c details */
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int i2c_address;
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struct i2c_adapter *i2c;
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u8 clk_out_div;
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u32 frequency;
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};
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static int ts2020_release(struct dvb_frontend *fe)
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{
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kfree(fe->tuner_priv);
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fe->tuner_priv = NULL;
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return 0;
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}
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static int ts2020_writereg(struct dvb_frontend *fe, int reg, int data)
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{
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struct ts2020_priv *priv = fe->tuner_priv;
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u8 buf[] = { reg, data };
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struct i2c_msg msg[] = {
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{
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.addr = priv->i2c_address,
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.flags = 0,
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.buf = buf,
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.len = 2
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}
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};
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int err;
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if (fe->ops.i2c_gate_ctrl)
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fe->ops.i2c_gate_ctrl(fe, 1);
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err = i2c_transfer(priv->i2c, msg, 1);
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if (err != 1) {
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printk(KERN_ERR
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"%s: writereg error(err == %i, reg == 0x%02x, value == 0x%02x)\n",
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__func__, err, reg, data);
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return -EREMOTEIO;
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}
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if (fe->ops.i2c_gate_ctrl)
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fe->ops.i2c_gate_ctrl(fe, 0);
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return 0;
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}
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static int ts2020_readreg(struct dvb_frontend *fe, u8 reg)
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{
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struct ts2020_state *state = fe->tuner_priv;
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struct ts2020_priv *priv = fe->tuner_priv;
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int ret;
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u8 b0[] = { reg };
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u8 b1[] = { 0 };
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struct i2c_msg msg[] = {
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{
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.addr = state->tuner_address,
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.addr = priv->i2c_address,
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.flags = 0,
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.buf = b0,
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.len = 1
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}, {
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.addr = state->tuner_address,
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.addr = priv->i2c_address,
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.flags = I2C_M_RD,
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.buf = b1,
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.len = 1
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@@ -53,212 +94,202 @@ static int ts2020_readreg(struct dvb_frontend *fe, u8 reg)
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if (fe->ops.i2c_gate_ctrl)
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fe->ops.i2c_gate_ctrl(fe, 1);
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ret = i2c_transfer(state->i2c, msg, 2);
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ret = i2c_transfer(priv->i2c, msg, 2);
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if (ret != 2) {
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printk(KERN_ERR "%s: reg=0x%x(error=%d)\n",
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__func__, reg, ret);
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return ret;
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}
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if (fe->ops.i2c_gate_ctrl)
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fe->ops.i2c_gate_ctrl(fe, 0);
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if (ret != 2) {
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printk(KERN_ERR "%s: reg=0x%x(error=%d)\n", __func__, reg, ret);
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return ret;
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}
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return b1[0];
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}
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static int ts2020_writereg(struct dvb_frontend *fe, int reg, int data)
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static int ts2020_sleep(struct dvb_frontend *fe)
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{
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struct ts2020_state *state = fe->tuner_priv;
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u8 buf[] = { reg, data };
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struct i2c_msg msg = { .addr = state->tuner_address,
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.flags = 0, .buf = buf, .len = 2 };
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int err;
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struct ts2020_priv *priv = fe->tuner_priv;
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int ret;
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u8 buf[] = { 10, 0 };
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struct i2c_msg msg = {
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.addr = priv->i2c_address,
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.flags = 0,
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.buf = buf,
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.len = 2
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};
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if (fe->ops.i2c_gate_ctrl)
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fe->ops.i2c_gate_ctrl(fe, 1);
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err = i2c_transfer(state->i2c, &msg, 1);
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ret = i2c_transfer(priv->i2c, &msg, 1);
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if (ret != 1)
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printk(KERN_ERR "%s: i2c error\n", __func__);
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if (fe->ops.i2c_gate_ctrl)
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fe->ops.i2c_gate_ctrl(fe, 0);
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if (err != 1) {
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printk(KERN_ERR "%s: writereg error(err == %i, reg == 0x%02x,"
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" value == 0x%02x)\n", __func__, err, reg, data);
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return -EREMOTEIO;
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}
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return 0;
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return (ret == 1) ? 0 : ret;
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}
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static int ts2020_init(struct dvb_frontend *fe)
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{
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struct ts2020_priv *priv = fe->tuner_priv;
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ts2020_writereg(fe, 0x42, 0x73);
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ts2020_writereg(fe, 0x05, 0x01);
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ts2020_writereg(fe, 0x62, 0xf5);
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ts2020_writereg(fe, 0x05, priv->clk_out_div);
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ts2020_writereg(fe, 0x20, 0x27);
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ts2020_writereg(fe, 0x07, 0x02);
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ts2020_writereg(fe, 0x11, 0xff);
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ts2020_writereg(fe, 0x60, 0xf9);
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ts2020_writereg(fe, 0x08, 0x01);
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ts2020_writereg(fe, 0x00, 0x41);
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return 0;
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}
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static int ts2020_get_frequency(struct dvb_frontend *fe, u32 *frequency)
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static int ts2020_tuner_gate_ctrl(struct dvb_frontend *fe, u8 offset)
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{
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u16 ndiv, div4;
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int ret;
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ret = ts2020_writereg(fe, 0x51, 0x1f - offset);
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ret |= ts2020_writereg(fe, 0x51, 0x1f);
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ret |= ts2020_writereg(fe, 0x50, offset);
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ret |= ts2020_writereg(fe, 0x50, 0x00);
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msleep(20);
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return ret;
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}
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div4 = (ts2020_readreg(fe, 0x10) & 0x10) >> 4;
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static int ts2020_set_tuner_rf(struct dvb_frontend *fe)
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{
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int reg;
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ndiv = ts2020_readreg(fe, 0x01);
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ndiv &= 0x0f;
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ndiv <<= 8;
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ndiv |= ts2020_readreg(fe, 0x02);
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reg = ts2020_readreg(fe, 0x3d);
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reg &= 0x7f;
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if (reg < 0x16)
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reg = 0xa1;
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else if (reg == 0x16)
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reg = 0x99;
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else
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reg = 0xf9;
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/* actual tuned frequency, i.e. including the offset */
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*frequency = (ndiv - ndiv % 2 + 1024) * TS2020_XTAL_FREQ
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/ (6 + 8) / (div4 + 1) / 2;
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ts2020_writereg(fe, 0x60, reg);
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reg = ts2020_tuner_gate_ctrl(fe, 0x08);
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return 0;
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return reg;
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}
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static int ts2020_set_params(struct dvb_frontend *fe)
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{
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struct dtv_frontend_properties *c = &fe->dtv_property_cache;
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struct ts2020_priv *priv = fe->demodulator_priv;
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int ret;
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u32 frequency = c->frequency;
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s32 offset_khz;
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u32 symbol_rate = (c->symbol_rate / 1000);
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u32 f3db, gdiv28;
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u16 value, ndiv, lpf_coeff;
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u8 lpf_mxdiv, mlpf_max, mlpf_min, nlpf;
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u8 lo = 0x01, div4 = 0x0;
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u8 mlpf, mlpf_new, mlpf_max, mlpf_min, nlpf;
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u16 value, ndiv;
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u32 srate = 0, f3db;
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/* Calculate frequency divider */
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if (frequency < 1060000) {
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lo |= 0x10;
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div4 = 0x1;
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ndiv = (frequency * 14 * 4) / TS2020_XTAL_FREQ;
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} else
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ndiv = (frequency * 14 * 2) / TS2020_XTAL_FREQ;
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ndiv = ndiv + ndiv % 2;
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ndiv = ndiv - 1024;
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ts2020_init(fe);
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ret = ts2020_writereg(fe, 0x10, 0x80 | lo);
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/* unknown */
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ts2020_writereg(fe, 0x07, 0x02);
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ts2020_writereg(fe, 0x10, 0x00);
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ts2020_writereg(fe, 0x60, 0x79);
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ts2020_writereg(fe, 0x08, 0x01);
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ts2020_writereg(fe, 0x00, 0x01);
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/* Set frequency divider */
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ret |= ts2020_writereg(fe, 0x01, (ndiv >> 8) & 0xf);
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ret |= ts2020_writereg(fe, 0x02, ndiv & 0xff);
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/* calculate and set freq divider */
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if (c->frequency < 1146000) {
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ts2020_writereg(fe, 0x10, 0x11);
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ndiv = ((c->frequency * (6 + 8) * 4) +
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(TS2020_XTAL_FREQ / 2)) /
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TS2020_XTAL_FREQ - 1024;
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} else {
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ts2020_writereg(fe, 0x10, 0x01);
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ndiv = ((c->frequency * (6 + 8) * 2) +
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(TS2020_XTAL_FREQ / 2)) /
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TS2020_XTAL_FREQ - 1024;
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}
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ret |= ts2020_writereg(fe, 0x03, 0x06);
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ret |= ts2020_tuner_gate_ctrl(fe, 0x10);
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if (ret < 0)
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return -ENODEV;
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ts2020_writereg(fe, 0x01, (ndiv & 0x0f00) >> 8);
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ts2020_writereg(fe, 0x02, ndiv & 0x00ff);
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/* Tuner Frequency Range */
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ret = ts2020_writereg(fe, 0x10, lo);
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/* set pll */
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ts2020_writereg(fe, 0x03, 0x06);
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ts2020_writereg(fe, 0x51, 0x0f);
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ts2020_writereg(fe, 0x51, 0x1f);
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ts2020_writereg(fe, 0x50, 0x10);
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ts2020_writereg(fe, 0x50, 0x00);
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msleep(5);
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ret |= ts2020_tuner_gate_ctrl(fe, 0x08);
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/* unknown */
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ts2020_writereg(fe, 0x51, 0x17);
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ts2020_writereg(fe, 0x51, 0x1f);
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ts2020_writereg(fe, 0x50, 0x08);
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ts2020_writereg(fe, 0x50, 0x00);
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msleep(5);
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/* Tuner RF */
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ret |= ts2020_set_tuner_rf(fe);
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value = ts2020_readreg(fe, 0x3d);
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value &= 0x0f;
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if ((value > 4) && (value < 15)) {
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value -= 3;
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if (value < 4)
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value = 4;
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value = ((value << 3) | 0x01) & 0x79;
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}
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gdiv28 = (TS2020_XTAL_FREQ / 1000 * 1694 + 500) / 1000;
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ret |= ts2020_writereg(fe, 0x04, gdiv28 & 0xff);
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ret |= ts2020_tuner_gate_ctrl(fe, 0x04);
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if (ret < 0)
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return -ENODEV;
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ts2020_writereg(fe, 0x60, value);
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ts2020_writereg(fe, 0x51, 0x17);
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ts2020_writereg(fe, 0x51, 0x1f);
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ts2020_writereg(fe, 0x50, 0x08);
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ts2020_writereg(fe, 0x50, 0x00);
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value = ts2020_readreg(fe, 0x26);
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/* set low-pass filter period */
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ts2020_writereg(fe, 0x04, 0x2e);
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ts2020_writereg(fe, 0x51, 0x1b);
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ts2020_writereg(fe, 0x51, 0x1f);
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ts2020_writereg(fe, 0x50, 0x04);
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ts2020_writereg(fe, 0x50, 0x00);
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msleep(5);
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srate = c->symbol_rate / 1000;
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f3db = (srate << 2) / 5 + 2000;
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if (srate < 5000)
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f3db += 3000;
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f3db = (symbol_rate * 135) / 200 + 2000;
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f3db += FREQ_OFFSET_LOW_SYM_RATE;
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if (f3db < 7000)
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f3db = 7000;
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if (f3db > 40000)
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f3db = 40000;
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/* set low-pass filter baseband */
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value = ts2020_readreg(fe, 0x26);
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mlpf = 0x2e * 207 / ((value << 1) + 151);
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mlpf_max = mlpf * 135 / 100;
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mlpf_min = mlpf * 78 / 100;
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gdiv28 = gdiv28 * 207 / (value * 2 + 151);
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mlpf_max = gdiv28 * 135 / 100;
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mlpf_min = gdiv28 * 78 / 100;
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if (mlpf_max > 63)
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mlpf_max = 63;
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/* rounded to the closest integer */
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nlpf = ((mlpf * f3db * 1000) + (2766 * TS2020_XTAL_FREQ / 2))
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/ (2766 * TS2020_XTAL_FREQ);
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lpf_coeff = 2766;
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nlpf = (f3db * gdiv28 * 2 / lpf_coeff /
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(TS2020_XTAL_FREQ / 1000) + 1) / 2;
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if (nlpf > 23)
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nlpf = 23;
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if (nlpf < 1)
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nlpf = 1;
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/* rounded to the closest integer */
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mlpf_new = ((TS2020_XTAL_FREQ * nlpf * 2766) +
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(1000 * f3db / 2)) / (1000 * f3db);
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lpf_mxdiv = (nlpf * (TS2020_XTAL_FREQ / 1000)
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* lpf_coeff * 2 / f3db + 1) / 2;
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if (mlpf_new < mlpf_min) {
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if (lpf_mxdiv < mlpf_min) {
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nlpf++;
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mlpf_new = ((TS2020_XTAL_FREQ * nlpf * 2766) +
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(1000 * f3db / 2)) / (1000 * f3db);
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lpf_mxdiv = (nlpf * (TS2020_XTAL_FREQ / 1000)
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* lpf_coeff * 2 / f3db + 1) / 2;
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}
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if (mlpf_new > mlpf_max)
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mlpf_new = mlpf_max;
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if (lpf_mxdiv > mlpf_max)
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lpf_mxdiv = mlpf_max;
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ts2020_writereg(fe, 0x04, mlpf_new);
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ts2020_writereg(fe, 0x06, nlpf);
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ts2020_writereg(fe, 0x51, 0x1b);
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ts2020_writereg(fe, 0x51, 0x1f);
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ts2020_writereg(fe, 0x50, 0x04);
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ts2020_writereg(fe, 0x50, 0x00);
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msleep(5);
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ret = ts2020_writereg(fe, 0x04, lpf_mxdiv);
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ret |= ts2020_writereg(fe, 0x06, nlpf);
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/* unknown */
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ts2020_writereg(fe, 0x51, 0x1e);
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ts2020_writereg(fe, 0x51, 0x1f);
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ts2020_writereg(fe, 0x50, 0x01);
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ts2020_writereg(fe, 0x50, 0x00);
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msleep(60);
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ret |= ts2020_tuner_gate_ctrl(fe, 0x04);
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return 0;
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ret |= ts2020_tuner_gate_ctrl(fe, 0x01);
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msleep(80);
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/* calculate offset assuming 96000kHz*/
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offset_khz = (ndiv - ndiv % 2 + 1024) * TS2020_XTAL_FREQ
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/ (6 + 8) / (div4 + 1) / 2;
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priv->frequency = offset_khz;
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return (ret < 0) ? -EINVAL : 0;
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}
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static int ts2020_release(struct dvb_frontend *fe)
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static int ts2020_get_frequency(struct dvb_frontend *fe, u32 *frequency)
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{
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struct ts2020_state *state = fe->tuner_priv;
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fe->tuner_priv = NULL;
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kfree(state);
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struct ts2020_priv *priv = fe->tuner_priv;
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*frequency = priv->frequency;
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return 0;
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}
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static int ts2020_get_signal_strength(struct dvb_frontend *fe,
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u16 *signal_strength)
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/* read TS2020 signal strength */
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static int ts2020_read_signal_strength(struct dvb_frontend *fe,
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u16 *signal_strength)
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{
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u16 sig_reading, sig_strength;
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u8 rfgain, bbgain;
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@@ -281,35 +312,57 @@ static int ts2020_get_signal_strength(struct dvb_frontend *fe,
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return 0;
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}
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static struct dvb_tuner_ops ts2020_ops = {
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static struct dvb_tuner_ops ts2020_tuner_ops = {
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.info = {
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.name = "Montage Technology TS2020 Silicon Tuner",
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.name = "TS2020",
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.frequency_min = 950000,
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.frequency_max = 2150000,
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.frequency_max = 2150000
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},
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.init = ts2020_init,
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.release = ts2020_release,
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.sleep = ts2020_sleep,
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.set_params = ts2020_set_params,
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.get_frequency = ts2020_get_frequency,
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.get_rf_strength = ts2020_get_signal_strength
|
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.get_rf_strength = ts2020_read_signal_strength,
|
||||
};
|
||||
|
||||
struct dvb_frontend *ts2020_attach(struct dvb_frontend *fe,
|
||||
const struct ts2020_config *config, struct i2c_adapter *i2c)
|
||||
const struct ts2020_config *config,
|
||||
struct i2c_adapter *i2c)
|
||||
{
|
||||
struct ts2020_state *state = NULL;
|
||||
struct ts2020_priv *priv = NULL;
|
||||
u8 buf;
|
||||
|
||||
/* allocate memory for the internal state */
|
||||
state = kzalloc(sizeof(struct ts2020_state), GFP_KERNEL);
|
||||
if (!state)
|
||||
priv = kzalloc(sizeof(struct ts2020_priv), GFP_KERNEL);
|
||||
if (priv == NULL)
|
||||
return NULL;
|
||||
|
||||
/* setup the state */
|
||||
state->tuner_address = config->tuner_address;
|
||||
state->i2c = i2c;
|
||||
fe->tuner_priv = state;
|
||||
fe->ops.tuner_ops = ts2020_ops;
|
||||
priv->i2c_address = config->tuner_address;
|
||||
priv->i2c = i2c;
|
||||
priv->clk_out_div = config->clk_out_div;
|
||||
fe->tuner_priv = priv;
|
||||
|
||||
/* Wake Up the tuner */
|
||||
if ((0x03 & ts2020_readreg(fe, 0x00)) == 0x00) {
|
||||
ts2020_writereg(fe, 0x00, 0x01);
|
||||
msleep(2);
|
||||
}
|
||||
|
||||
ts2020_writereg(fe, 0x00, 0x03);
|
||||
msleep(2);
|
||||
|
||||
/* Check the tuner version */
|
||||
buf = ts2020_readreg(fe, 0x00);
|
||||
if ((buf == 0x01) || (buf == 0x41) || (buf == 0x81))
|
||||
printk(KERN_INFO "%s: Find tuner TS2020!\n", __func__);
|
||||
else {
|
||||
printk(KERN_ERR "%s: Read tuner reg[0] = %d\n", __func__, buf);
|
||||
kfree(priv);
|
||||
return NULL;
|
||||
}
|
||||
|
||||
memcpy(&fe->ops.tuner_ops, &ts2020_tuner_ops,
|
||||
sizeof(struct dvb_tuner_ops));
|
||||
fe->ops.read_signal_strength = fe->ops.tuner_ops.get_rf_strength;
|
||||
|
||||
return fe;
|
||||
|
||||
Reference in New Issue
Block a user