drm/radeon/dpm: fix spread spectrum setup (v2)
Need to check for engine and memory clock ss separately and only enable dynamic ss if either of them are found. This should fix systems which have a ss table, but do not have entries for engine or memory. On those systems we may enable dynamic spread spectrum without enabling it on the engine or memory clocks which can lead to a hang in some cases. fixes some systems reported here: https://bugs.freedesktop.org/show_bug.cgi?id=66963 v2: fix typo Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@@ -2038,9 +2038,6 @@ int cypress_dpm_init(struct radeon_device *rdev)
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{
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struct rv7xx_power_info *pi;
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struct evergreen_power_info *eg_pi;
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int index = GetIndexIntoMasterTable(DATA, ASIC_InternalSS_Info);
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uint16_t data_offset, size;
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uint8_t frev, crev;
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struct atom_clock_dividers dividers;
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int ret;
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@@ -2092,16 +2089,7 @@ int cypress_dpm_init(struct radeon_device *rdev)
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eg_pi->vddci_control =
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radeon_atom_is_voltage_gpio(rdev, SET_VOLTAGE_TYPE_ASIC_VDDCI, 0);
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if (atom_parse_data_header(rdev->mode_info.atom_context, index, &size,
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&frev, &crev, &data_offset)) {
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pi->sclk_ss = true;
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pi->mclk_ss = true;
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pi->dynamic_ss = true;
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} else {
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pi->sclk_ss = false;
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pi->mclk_ss = false;
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pi->dynamic_ss = true;
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}
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rv770_get_engine_memory_ss(rdev);
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pi->asi = RV770_ASI_DFLT;
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pi->pasi = CYPRESS_HASI_DFLT;
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