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clk: qcom: Add MSM8960/APQ8064 LPASS clock controller (LCC) driver

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Add an LCC driver for MSM8960/APQ8064 that supports the i2s,
slimbus, and pcm clocks.

Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Tested-by: Kenneth Westfield <kwestfie@codeaurora.org>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
This commit is contained in:
Stephen Boyd
2015-01-19 18:05:34 -08:00
committed by Michael Turquette
parent c99e515a92
commit b82875ee07
4 changed files with 645 additions and 0 deletions
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50
include/dt-bindings/clock/qcom,lcc-msm8960.h Normal file
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/*
* Copyright (c) 2014, The Linux Foundation. All rights reserved.
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
* may be copied, distributed, and modified under those terms.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef _DT_BINDINGS_CLK_LCC_MSM8960_H
#define _DT_BINDINGS_CLK_LCC_MSM8960_H
#define PLL4 0
#define MI2S_OSR_SRC 1
#define MI2S_OSR_CLK 2
#define MI2S_DIV_CLK 3
#define MI2S_BIT_DIV_CLK 4
#define MI2S_BIT_CLK 5
#define PCM_SRC 6
#define PCM_CLK_OUT 7
#define PCM_CLK 8
#define SLIMBUS_SRC 9
#define AUDIO_SLIMBUS_CLK 10
#define SPS_SLIMBUS_CLK 11
#define CODEC_I2S_MIC_OSR_SRC 12
#define CODEC_I2S_MIC_OSR_CLK 13
#define CODEC_I2S_MIC_DIV_CLK 14
#define CODEC_I2S_MIC_BIT_DIV_CLK 15
#define CODEC_I2S_MIC_BIT_CLK 16
#define SPARE_I2S_MIC_OSR_SRC 17
#define SPARE_I2S_MIC_OSR_CLK 18
#define SPARE_I2S_MIC_DIV_CLK 19
#define SPARE_I2S_MIC_BIT_DIV_CLK 20
#define SPARE_I2S_MIC_BIT_CLK 21
#define CODEC_I2S_SPKR_OSR_SRC 22
#define CODEC_I2S_SPKR_OSR_CLK 23
#define CODEC_I2S_SPKR_DIV_CLK 24
#define CODEC_I2S_SPKR_BIT_DIV_CLK 25
#define CODEC_I2S_SPKR_BIT_CLK 26
#define SPARE_I2S_SPKR_OSR_SRC 27
#define SPARE_I2S_SPKR_OSR_CLK 28
#define SPARE_I2S_SPKR_DIV_CLK 29
#define SPARE_I2S_SPKR_BIT_DIV_CLK 30
#define SPARE_I2S_SPKR_BIT_CLK 31
#endif