Merge tag 'drm-intel-next-2016-09-19' of git://anongit.freedesktop.org/drm-intel into drm-next
- refactor the sseu code (Imre) - refine guc dmesg output (Dave Gordon) - more vgpu work - more skl wm fixes (Lyude) - refactor dpll code in prep for upfront link training (Jim Bride et al) - consolidate all platform feature checks into intel_device_info (Carlos Santa) - refactor elsp/execlist submission as prep for re-submission after hang recovery and eventually scheduling (Chris Wilson) - allow synchronous gpu reset handling, to remove tricky/impossible/fragile error recovery code (Chris Wilson) - prep work for nonblocking (execlist) submission, using fences to track depencies and drive elsp submission (Chris Wilson) - partial error recover/resubmission of non-guilty batches after hangs (Chris Wilson) - full dma-buf implicit fencing support (Chris Wilson) - dp link training fixes (Jim, Dhinkaran, Navare, ...) - obey dp branch device pixel rate/bpc/clock limits (Mika Kahola), needed for many vga dongles - bunch of small cleanups and polish all over, as usual [airlied: printing macros collided] * tag 'drm-intel-next-2016-09-19' of git://anongit.freedesktop.org/drm-intel: (163 commits) drm/i915: Update DRIVER_DATE to 20160919 drm: Fix DisplayPort branch device ID kernel-doc drm/i915: use NULL for NULL pointers drm/i915: do not use 'false' as a NULL pointer drm/i915: make intel_dp_compute_bpp static drm: Add DP branch device info on debugfs drm/i915: Update bits per component for display info drm/i915: Check pixel rate for DP to VGA dongle drm/i915: Read DP branch device SW revision drm/i915: Read DP branch device HW revision drm/i915: Cleanup DisplayPort AUX channel initialization drm: Read DP branch device id drm: Helper to read max bits per component drm: Helper to read max clock rate drm: Drop VGA from bpc definitions drm: Add missing DP downstream port types drm/i915: Add ddb size field to device info structure drm/i915/guc: general tidying up (submission) drm/i915/guc: general tidying up (loader) drm/i915: clarify PMINTRMSK/pm_intr_keep usage ...
This commit is contained in:
Dave Airlie
@@ -439,6 +439,179 @@ int drm_dp_link_configure(struct drm_dp_aux *aux, struct drm_dp_link *link)
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}
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EXPORT_SYMBOL(drm_dp_link_configure);
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/**
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* drm_dp_downstream_max_clock() - extract branch device max
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* pixel rate for legacy VGA
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* converter or max TMDS clock
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* rate for others
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* @dpcd: DisplayPort configuration data
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* @port_cap: port capabilities
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*
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* Returns max clock in kHz on success or 0 if max clock not defined
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*/
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int drm_dp_downstream_max_clock(const u8 dpcd[DP_RECEIVER_CAP_SIZE],
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const u8 port_cap[4])
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{
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int type = port_cap[0] & DP_DS_PORT_TYPE_MASK;
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bool detailed_cap_info = dpcd[DP_DOWNSTREAMPORT_PRESENT] &
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DP_DETAILED_CAP_INFO_AVAILABLE;
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if (!detailed_cap_info)
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return 0;
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switch (type) {
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case DP_DS_PORT_TYPE_VGA:
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return port_cap[1] * 8 * 1000;
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case DP_DS_PORT_TYPE_DVI:
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case DP_DS_PORT_TYPE_HDMI:
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case DP_DS_PORT_TYPE_DP_DUALMODE:
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return port_cap[1] * 2500;
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default:
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return 0;
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}
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}
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EXPORT_SYMBOL(drm_dp_downstream_max_clock);
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/**
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* drm_dp_downstream_max_bpc() - extract branch device max
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* bits per component
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* @dpcd: DisplayPort configuration data
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* @port_cap: port capabilities
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*
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* Returns max bpc on success or 0 if max bpc not defined
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*/
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int drm_dp_downstream_max_bpc(const u8 dpcd[DP_RECEIVER_CAP_SIZE],
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const u8 port_cap[4])
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{
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int type = port_cap[0] & DP_DS_PORT_TYPE_MASK;
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bool detailed_cap_info = dpcd[DP_DOWNSTREAMPORT_PRESENT] &
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DP_DETAILED_CAP_INFO_AVAILABLE;
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int bpc;
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if (!detailed_cap_info)
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return 0;
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switch (type) {
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case DP_DS_PORT_TYPE_VGA:
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case DP_DS_PORT_TYPE_DVI:
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case DP_DS_PORT_TYPE_HDMI:
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case DP_DS_PORT_TYPE_DP_DUALMODE:
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bpc = port_cap[2] & DP_DS_MAX_BPC_MASK;
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switch (bpc) {
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case DP_DS_8BPC:
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return 8;
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case DP_DS_10BPC:
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return 10;
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case DP_DS_12BPC:
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return 12;
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case DP_DS_16BPC:
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return 16;
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}
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default:
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return 0;
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}
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}
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EXPORT_SYMBOL(drm_dp_downstream_max_bpc);
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/**
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* drm_dp_downstream_id() - identify branch device
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* @aux: DisplayPort AUX channel
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* @id: DisplayPort branch device id
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*
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* Returns branch device id on success or NULL on failure
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*/
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int drm_dp_downstream_id(struct drm_dp_aux *aux, char id[6])
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{
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return drm_dp_dpcd_read(aux, DP_BRANCH_ID, id, 6);
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}
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EXPORT_SYMBOL(drm_dp_downstream_id);
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/**
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* drm_dp_downstream_debug() - debug DP branch devices
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* @m: pointer for debugfs file
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* @dpcd: DisplayPort configuration data
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* @port_cap: port capabilities
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* @aux: DisplayPort AUX channel
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*
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*/
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void drm_dp_downstream_debug(struct seq_file *m,
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const u8 dpcd[DP_RECEIVER_CAP_SIZE],
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const u8 port_cap[4], struct drm_dp_aux *aux)
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{
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bool detailed_cap_info = dpcd[DP_DOWNSTREAMPORT_PRESENT] &
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DP_DETAILED_CAP_INFO_AVAILABLE;
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int clk;
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int bpc;
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char id[6];
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int len;
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uint8_t rev[2];
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int type = port_cap[0] & DP_DS_PORT_TYPE_MASK;
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bool branch_device = dpcd[DP_DOWNSTREAMPORT_PRESENT] &
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DP_DWN_STRM_PORT_PRESENT;
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seq_printf(m, "\tDP branch device present: %s\n",
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branch_device ? "yes" : "no");
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if (!branch_device)
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return;
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switch (type) {
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case DP_DS_PORT_TYPE_DP:
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seq_puts(m, "\t\tType: DisplayPort\n");
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break;
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case DP_DS_PORT_TYPE_VGA:
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seq_puts(m, "\t\tType: VGA\n");
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break;
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case DP_DS_PORT_TYPE_DVI:
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seq_puts(m, "\t\tType: DVI\n");
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break;
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case DP_DS_PORT_TYPE_HDMI:
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seq_puts(m, "\t\tType: HDMI\n");
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break;
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case DP_DS_PORT_TYPE_NON_EDID:
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seq_puts(m, "\t\tType: others without EDID support\n");
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break;
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case DP_DS_PORT_TYPE_DP_DUALMODE:
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seq_puts(m, "\t\tType: DP++\n");
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break;
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case DP_DS_PORT_TYPE_WIRELESS:
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seq_puts(m, "\t\tType: Wireless\n");
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break;
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default:
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seq_puts(m, "\t\tType: N/A\n");
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}
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drm_dp_downstream_id(aux, id);
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seq_printf(m, "\t\tID: %s\n", id);
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len = drm_dp_dpcd_read(aux, DP_BRANCH_HW_REV, &rev[0], 1);
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if (len > 0)
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seq_printf(m, "\t\tHW: %d.%d\n",
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(rev[0] & 0xf0) >> 4, rev[0] & 0xf);
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len = drm_dp_dpcd_read(aux, DP_BRANCH_SW_REV, &rev, 2);
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if (len > 0)
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seq_printf(m, "\t\tSW: %d.%d\n", rev[0], rev[1]);
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if (detailed_cap_info) {
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clk = drm_dp_downstream_max_clock(dpcd, port_cap);
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if (clk > 0) {
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if (type == DP_DS_PORT_TYPE_VGA)
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seq_printf(m, "\t\tMax dot clock: %d kHz\n", clk);
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else
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seq_printf(m, "\t\tMax TMDS clock: %d kHz\n", clk);
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}
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bpc = drm_dp_downstream_max_bpc(dpcd, port_cap);
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if (bpc > 0)
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seq_printf(m, "\t\tMax bpc: %d\n", bpc);
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}
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}
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EXPORT_SYMBOL(drm_dp_downstream_debug);
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/*
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* I2C-over-AUX implementation
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*/
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