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x86/cpu: Enable FSGSBASE on 64bit by default and add a chicken bit

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Now that FSGSBASE is fully supported, remove unsafe_fsgsbase, enable
FSGSBASE by default, and add nofsgsbase to disable it.

Signed-off-by: Andy Lutomirski <luto@kernel.org>
Signed-off-by: Chang S. Bae <chang.seok.bae@intel.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Sasha Levin <sashal@kernel.org>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Andi Kleen <ak@linux.intel.com>
Link: https://lkml.kernel.org/r/1557309753-24073-17-git-send-email-chang.seok.bae@intel.com
Link: https://lkml.kernel.org/r/20200528201402.1708239-13-sashal@kernel.org
This commit is contained in:
Andy Lutomirski
2020-05-28 16:13:58 -04:00
committed by Thomas Gleixner
parent c82965f9e5
commit b745cfba44
2 changed files with 15 additions and 20 deletions
Download Patch File Download Diff File Expand all files Collapse all files

32
arch/x86/kernel/cpu/common.c
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@@ -441,21 +441,21 @@ static void __init setup_cr_pinning(void)
static_key_enable(&cr_pinning.key);
}
/*
* Temporary hack: FSGSBASE is unsafe until a few kernel code paths are
* updated. This allows us to get the kernel ready incrementally.
*
* Once all the pieces are in place, these will go away and be replaced with
* a nofsgsbase chicken flag.
*/
static bool unsafe_fsgsbase;
static __init int setup_unsafe_fsgsbase(char *arg)
static __init int x86_nofsgsbase_setup(char *arg)
{
unsafe_fsgsbase = true;
/* Require an exact match without trailing characters. */
if (strlen(arg))
return 0;
/* Do not emit a message if the feature is not present. */
if (!boot_cpu_has(X86_FEATURE_FSGSBASE))
return 1;
setup_clear_cpu_cap(X86_FEATURE_FSGSBASE);
pr_info("FSGSBASE disabled via kernel command line\n");
return 1;
}
__setup("unsafe_fsgsbase", setup_unsafe_fsgsbase);
__setup("nofsgsbase", x86_nofsgsbase_setup);
/*
* Protection Keys are not available in 32-bit mode.
@@ -1512,12 +1512,8 @@ static void identify_cpu(struct cpuinfo_x86 *c)
setup_umip(c);
/* Enable FSGSBASE instructions if available. */
if (cpu_has(c, X86_FEATURE_FSGSBASE)) {
if (unsafe_fsgsbase)
cr4_set_bits(X86_CR4_FSGSBASE);
else
clear_cpu_cap(c, X86_FEATURE_FSGSBASE);
}
if (cpu_has(c, X86_FEATURE_FSGSBASE))
cr4_set_bits(X86_CR4_FSGSBASE);
/*
* The vendor-specific functions might have changed features.