Merge tag 'omap-for-v3.9/gpmc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/drivers
From Tony Lindgren: OMAP GPMC (General Purpose Memory Controller) changes to add device tree bindings. * tag 'omap-for-v3.9/gpmc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: OMAP2+: gpmc: Add device tree documentation for elm handle ARM: OMAP2+: gpmc: add DT bindings for OneNAND ARM: OMAP2+: gpmc-onenand: drop __init annotation mtd: omap-onenand: pass device_node in platform data ARM: OMAP2+: Prevent potential crash if GPMC probe fails ARM: OMAP2+: gpmc: Remove unneeded of_node_put() ARM: OMAP: gpmc: add DT bindings for GPMC timings and NAND ARM: OMAP: gpmc: enable hwecc for AM33xx SoCs ARM: OMAP: gpmc-nand: drop __init annotation mtd: omap-nand: pass device_node in platform data ARM: OMAP: gpmc: don't create devices from initcall on DT Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson
84
Documentation/devicetree/bindings/bus/ti-gpmc.txt
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84
Documentation/devicetree/bindings/bus/ti-gpmc.txt
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Device tree bindings for OMAP general purpose memory controllers (GPMC)
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The actual devices are instantiated from the child nodes of a GPMC node.
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Required properties:
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- compatible: Should be set to one of the following:
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ti,omap2420-gpmc (omap2420)
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ti,omap2430-gpmc (omap2430)
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ti,omap3430-gpmc (omap3430 & omap3630)
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ti,omap4430-gpmc (omap4430 & omap4460 & omap543x)
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ti,am3352-gpmc (am335x devices)
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- reg: A resource specifier for the register space
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(see the example below)
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- ti,hwmods: Should be set to "ti,gpmc" until the DT transition is
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completed.
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- #address-cells: Must be set to 2 to allow memory address translation
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- #size-cells: Must be set to 1 to allow CS address passing
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- gpmc,num-cs: The maximum number of chip-select lines that controller
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can support.
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- gpmc,num-waitpins: The maximum number of wait pins that controller can
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support.
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- ranges: Must be set up to reflect the memory layout with four
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integer values for each chip-select line in use:
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<cs-number> 0 <physical address of mapping> <size>
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Currently, calculated values derived from the contents
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of the per-CS register GPMC_CONFIG7 (as set up by the
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bootloader) are used for the physical address decoding.
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As this will change in the future, filling correct
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values here is a requirement.
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Timing properties for child nodes. All are optional and default to 0.
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- gpmc,sync-clk: Minimum clock period for synchronous mode, in picoseconds
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Chip-select signal timings corresponding to GPMC_CONFIG2:
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- gpmc,cs-on: Assertion time
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- gpmc,cs-rd-off: Read deassertion time
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- gpmc,cs-wr-off: Write deassertion time
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ADV signal timings corresponding to GPMC_CONFIG3:
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- gpmc,adv-on: Assertion time
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- gpmc,adv-rd-off: Read deassertion time
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- gpmc,adv-wr-off: Write deassertion time
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WE signals timings corresponding to GPMC_CONFIG4:
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- gpmc,we-on: Assertion time
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- gpmc,we-off: Deassertion time
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OE signals timings corresponding to GPMC_CONFIG4:
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- gpmc,oe-on: Assertion time
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- gpmc,oe-off: Deassertion time
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Access time and cycle time timings corresponding to GPMC_CONFIG5:
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- gpmc,page-burst-access: Multiple access word delay
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- gpmc,access: Start-cycle to first data valid delay
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- gpmc,rd-cycle: Total read cycle time
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- gpmc,wr-cycle: Total write cycle time
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The following are only applicable to OMAP3+ and AM335x:
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- gpmc,wr-access
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- gpmc,wr-data-mux-bus
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Example for an AM33xx board:
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gpmc: gpmc@50000000 {
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compatible = "ti,am3352-gpmc";
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ti,hwmods = "gpmc";
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reg = <0x50000000 0x2000>;
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interrupts = <100>;
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gpmc,num-cs = <8>;
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gpmc,num-waitpins = <2>;
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#address-cells = <2>;
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#size-cells = <1>;
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ranges = <0 0 0x08000000 0x10000000>; /* CS0 @addr 0x8000000, size 0x10000000 */
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/* child nodes go here */
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};
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80
Documentation/devicetree/bindings/mtd/gpmc-nand.txt
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80
Documentation/devicetree/bindings/mtd/gpmc-nand.txt
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Device tree bindings for GPMC connected NANDs
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GPMC connected NAND (found on OMAP boards) are represented as child nodes of
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the GPMC controller with a name of "nand".
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All timing relevant properties as well as generic gpmc child properties are
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explained in a separate documents - please refer to
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Documentation/devicetree/bindings/bus/ti-gpmc.txt
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For NAND specific properties such as ECC modes or bus width, please refer to
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Documentation/devicetree/bindings/mtd/nand.txt
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Required properties:
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- reg: The CS line the peripheral is connected to
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Optional properties:
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- nand-bus-width: Set this numeric value to 16 if the hardware
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is wired that way. If not specified, a bus
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width of 8 is assumed.
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- ti,nand-ecc-opt: A string setting the ECC layout to use. One of:
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"sw" Software method (default)
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"hw" Hardware method
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"hw-romcode" gpmc hamming mode method & romcode layout
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"bch4" 4-bit BCH ecc code
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"bch8" 8-bit BCH ecc code
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- elm_id: Specifies elm device node. This is required to support BCH
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error correction using ELM module.
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For inline partiton table parsing (optional):
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- #address-cells: should be set to 1
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- #size-cells: should be set to 1
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Example for an AM33xx board:
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gpmc: gpmc@50000000 {
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compatible = "ti,am3352-gpmc";
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ti,hwmods = "gpmc";
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reg = <0x50000000 0x1000000>;
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interrupts = <100>;
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gpmc,num-cs = <8>;
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gpmc,num-waitpins = <2>;
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#address-cells = <2>;
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#size-cells = <1>;
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ranges = <0 0 0x08000000 0x2000>; /* CS0: NAND */
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elm_id = <&elm>;
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nand@0,0 {
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reg = <0 0 0>; /* CS0, offset 0 */
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nand-bus-width = <16>;
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ti,nand-ecc-opt = "bch8";
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gpmc,sync-clk = <0>;
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gpmc,cs-on = <0>;
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gpmc,cs-rd-off = <44>;
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gpmc,cs-wr-off = <44>;
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gpmc,adv-on = <6>;
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gpmc,adv-rd-off = <34>;
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gpmc,adv-wr-off = <44>;
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gpmc,we-off = <40>;
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gpmc,oe-off = <54>;
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gpmc,access = <64>;
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gpmc,rd-cycle = <82>;
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gpmc,wr-cycle = <82>;
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gpmc,wr-access = <40>;
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gpmc,wr-data-mux-bus = <0>;
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#address-cells = <1>;
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#size-cells = <1>;
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/* partitions go here */
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};
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};
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43
Documentation/devicetree/bindings/mtd/gpmc-onenand.txt
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43
Documentation/devicetree/bindings/mtd/gpmc-onenand.txt
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@@ -0,0 +1,43 @@
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Device tree bindings for GPMC connected OneNANDs
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GPMC connected OneNAND (found on OMAP boards) are represented as child nodes of
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the GPMC controller with a name of "onenand".
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All timing relevant properties as well as generic gpmc child properties are
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explained in a separate documents - please refer to
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Documentation/devicetree/bindings/bus/ti-gpmc.txt
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Required properties:
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- reg: The CS line the peripheral is connected to
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Optional properties:
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- dma-channel: DMA Channel index
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For inline partiton table parsing (optional):
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- #address-cells: should be set to 1
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- #size-cells: should be set to 1
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Example for an OMAP3430 board:
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gpmc: gpmc@6e000000 {
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compatible = "ti,omap3430-gpmc";
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ti,hwmods = "gpmc";
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reg = <0x6e000000 0x1000000>;
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interrupts = <20>;
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gpmc,num-cs = <8>;
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gpmc,num-waitpins = <4>;
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#address-cells = <2>;
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#size-cells = <1>;
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onenand@0 {
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reg = <0 0 0>; /* CS0, offset 0 */
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#address-cells = <1>;
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#size-cells = <1>;
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/* partitions go here */
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};
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};
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